05-17-2018 04:00 PM
Several questions on Zynq-7000 series:
05-17-2018 10:50 PM
Comment: Connect FPGA_Done to an external 330 ohm pull up resistor to VCCO_0(Bank o supply voltage)
2. Does power sequencing on the rails affect FPGA_DONE?
Comment: If you follow power sequencing recommended by xilinx. There won't be any problem.
3. If the VCC_IO of a particular user IO bank is not stable, does it affect FPGA_DONE?
comment: what is meant by IO bank voltage is not stable. Most of the dedicated pins of your FPGA will residein the Bank 0. You should provide stable voltage within the limits suggested by xilinx 7-series DC-DC characteristics.
If it is useful kudos and accept it as a soultion
05-18-2018 01:12 AM
some links might be of use,
'done' is a open drain pin, so it can only pull down, relying upon pul ups to vcc
Ensure your supplies are stable and within spec before configuring / booting,