This board is intended to discuss Processor System design for Versal, Zynq UltraScale+, Zynq-7000, and MicroBlaze.
Few PS and PL peripherals covered in this board are Interrupts, Timers, GPIO, UART, PS-SPI, USB, SATA, I2C, UART, CAN, CAN-FD, RTC, and EPC.
This includes the Versal Control, Interface & Processing System (CIPS) Wizard and Processor Configuration Wizard (PCW) as well.
Also, AXI infrastructure IPs such as AXI-stream, interconnect, memory-mapped, DMA etc are included to this board.
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