04-20-2019 01:07 AM
I am looking to build a Zyny-7000 project that will employ both of the GEMAC peripherals in the Zynq device. I understand that this will consume a lot of the PS I/O, and that there are options to route one of the GEMAC peripherals down into the PL via EMIO, and out of the chip over RGMII or SGMII.
However, upon reviewing the Zynq documentation, it appears that pushing the 2nd GEMAC I/O into the PL adds significant complexity and risk to the design.
1) Is it the opinon of this forum that both GEMACS should be kept in the PS, and not routed down into the PL if at all possible?
2) Are there any Zynq dev-kit daughter card combinations that will give me access to the 2nd GEMAC, straight out of the PS MIO pins?
3) Are there any tutorial guides that demonstate how to build a Twin GEMAC system where both GEMACs are wholly realised in the PS?
This design will also require a number of slow peripheral I/O from the PS, and it is these that I plan to push down into the PL via the EMIO. However......
4) If I am forced to route one of the the GEMAC peripherals down into the PL, should I pursue a RGMII or SGMII solution?
5) Of these two solutions, which is better documented with example designs and crutially support for PetaLinux?