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legendbb
Voyager
Voyager
1,371 Views
Registered: ‎07-28-2008

ZynqMP how to enable DDR Write CRC?

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Could not find any by google, or in UG1085, PG201.

 

Is it: DDR Configuration > Other Options > Parity

 

Thanks,

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dylan
Xilinx Employee
Xilinx Employee
1,676 Views
Registered: ‎07-30-2007
Correct, WriteCRC will not be enabled by default.

View solution in original post

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dylan
Xilinx Employee
Xilinx Employee
1,341 Views
Registered: ‎07-30-2007
https://www.xilinx.com/support/answers/68788.html

Can you clarify why you think you need it? It has a strong performance impact and shouldn't usually be needed in embedded memory topologies.
legendbb
Voyager
Voyager
1,324 Views
Registered: ‎07-28-2008

Thanks for comments, quite the opposite on use case.

We need to swap pins for DDR memory, just want to make sure Wire CRC is not accidentally enabled.

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dylan
Xilinx Employee
Xilinx Employee
1,677 Views
Registered: ‎07-30-2007
Correct, WriteCRC will not be enabled by default.

View solution in original post

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