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Registered: ‎02-28-2019

microblaze

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hello, i have a problem about microblaze local ram。Can I use DDR instead of local ram?PS:I disable local ram in microblaze;DDR connects to DC port

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Registered: ‎09-12-2007

The Microblaze uses the C_BASE_VECTORS param to know where to execute from.

https://www.xilinx.com/support/documentation/sw_manuals/xilinx2019_2/ug984-vivado-microblaze-ref.pdf

If this is the LMB, this is normally set to 0x00000000. If you are executing from DDR, then there is a bootloop in the LMB

that will just wait untill the DDR is ready. So, if you want to execute directly from the DDR, then you would need to update the C_BASE_VECTORS,

then hold the MB in reset (see reset_mode in the docs), untill the DDR is calibrated.

 

If you are doing this in JTAG then this is all OK. However, What issue are you seeing with LMB? you would be best addressing this issues

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Registered: ‎10-30-2017

Hi @diannaoyoujian ,

 

Please refer this post: https://forums.xilinx.com/t5/Processor-System-Design/Program-executing-from-DDR/td-p/39344

It will help you to run the microblaze from DDR memory.

Best Regards,
Srikanth
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Moderator
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Registered: ‎09-12-2007

The Microblaze uses the C_BASE_VECTORS param to know where to execute from.

https://www.xilinx.com/support/documentation/sw_manuals/xilinx2019_2/ug984-vivado-microblaze-ref.pdf

If this is the LMB, this is normally set to 0x00000000. If you are executing from DDR, then there is a bootloop in the LMB

that will just wait untill the DDR is ready. So, if you want to execute directly from the DDR, then you would need to update the C_BASE_VECTORS,

then hold the MB in reset (see reset_mode in the docs), untill the DDR is calibrated.

 

If you are doing this in JTAG then this is all OK. However, What issue are you seeing with LMB? you would be best addressing this issues

View solution in original post

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Registered: ‎02-28-2019

Thank you very much!You solve the problem perfectly!

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