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Explorer
Explorer
269 Views
Registered: ‎10-16-2018

Contraints in Vivado & source code in SDK

Hi All , @stefana @h_corey

I completed my block diagram design in Vivado, and I used Microblaze IP for AXI control, and PmodDA3 IP.  (1st picture)

But , I want to know how to assign Constraints to the JA Connector and what are source code that should be written in SDK ? 

I am using Arty 7. 

Kindly, see the attached pictures.

Looking forward your help.

Thanks .

design_completed.JPG
photo_2018-12-22_00-55-08.jpg
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1 Reply
Voyager
Voyager
190 Views
Registered: ‎02-01-2013

Re: Contraints in Vivado & source code in SDK

Have you tried looking at the Arty 7 support website?

     https://reference.digilentinc.com/reference/programmable-logic/arty-a7/start

Follow the link that says "Master XDC Files" to find assignments for connector-bound signals.

That website probably is the best place to start a search for source code, too.

Note that your photo shows your PModDA3 plugged into connector JD, not JA.

-Joe G.