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Observer @bucky
Observer
262 Views
Registered: ‎11-22-2018

Cortex-A9 IRQ with priority over configMAX_API_CALL_INTERRUPT_PRIORITY / Motor Control

Hi guys,

I'm using a Xilinx ZYNQ device equipped with the help of FreeRTOS port.

The final application will be used in the context of electric motor control so, in order to reduce control-law interrupt latency, I've registered the related handler with a priority that exceeds configMAX_API_CALL_INTERRUPT_PRIORITY.

Given the previous settings, the interrupt is properly triggered also under FreeRTOS critical sections - exactly as I expected to.
Now, I intend to share data between application tasks and the aforementioned interrupt handler.

To avoid race condition I intend to mask cpu interrupts, write the data, and then re-enable cpu interrupts.
Something like in the example reported below.

Is this possible /is there a better way to do it?
Does it interfere with FreeRTOS itself leading to system failure?

 

static uint32_t EM_PositionReferece = 0u;

/* run in the context of the task */
void EM_SetPositionReference(UINT32 user)
{
/* mask CPU interrupt */
__asm volatile ( "CPSID i");
__asm volatile ( "DSB" );
__asm volatile ( "ISB" );

/* set motor-control position reference to be used in interrupt */
EM_PositionReferece = user;

/*
* NO FreeRTOS API usage here!
*/

/* un-mask CPU interrupt */
__asm volatile ( "CPSIE i");
__asm volatile ( "DSB" );
__asm volatile ( "ISB" );
}

void PL_IRQHandler(void)
{
ControlLaw_Exec(EM_PositionReferece );

/*
* NO FreeRTOS API usage here!
*/
}

As last thing, in the previous example the interrupt are fully masked and then unmasked.
Is there a way (e.g. a dedicated CPU instruction) to get interrupt masking status and simultaneously disabling them?
What I want to achieve is something like the line below

 

 

/* mask interrupt and get previous masking status */
irqMask = _MaskIRQ();

/*
* set motor-control variable shared with IRQ
*/

/* restore interrupt masking status read at _MaskIRQ */
_RestoreIRQ(irqMask);

 

 

Thanks in advance,

Bucky

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Observer richardbarry
Observer
242 Views
Registered: ‎04-26-2008

Re: Cortex-A9 IRQ with priority over configMAX_API_CALL_INTERRUPT_PRIORITY / Motor Control

Replied here https://sourceforge.net/p/freertos/discussion/382005/thread/4e4767a000/

Regards,
Richard.

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