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Participant julian.bauer
Participant
1,353 Views
Registered: ‎11-18-2016

ERROR on ETH0 when using ILA Core

Hello,

 

I'm using a bare-metal app on a microzed board. I use the onboard eth0 together with LWIP. If I use an ILA Core in my PL and I built the Bitstream, no error occures but in my application, ethernet isn't working.

If I go back to Vivado and take a look at the zynq processing system block, the PCW ENET0 PERIPHERAL FREQMHZ is red!

 

Sometimes it works, sometimes not. I have no idea what the problem should be.

I'm using Vivado 2014.4

 

Thanks for you help

eth0.png
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5 Replies
Scholar dpaul24
Scholar
1,347 Views
Registered: ‎08-07-2014

Re: ERROR on ETH0 when using ILA Core

Sometimes it works, sometimes not. I have no idea what the problem should be.

 

I can't say much, but such a think may happen due to timing problem at the FPGA interface. Specially the rx/tx Ethernet data timing. Due to wrong timing sometimes it is working by chance.

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FPGA enthusiast!
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Participant julian.bauer
Participant
1,336 Views
Registered: ‎11-18-2016

Re: ERROR on ETH0 when using ILA Core

thank you for your answer.

 

I have the problem still since I use the ILA Core. Before I never had the problem. How should the ILA core influence the timings at the ethernet interface?

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Participant julian.bauer
Participant
1,307 Views
Registered: ‎11-18-2016

Re: ERROR on ETH0 when using ILA Core

now i made a screenshot. please take a look

eth0.png
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Scholar dpaul24
Scholar
1,302 Views
Registered: ‎08-07-2014

Re: ERROR on ETH0 when using ILA Core

Hi,

 

I think I might have a theory from your latest SS.

 

The PLL in your design cannot generate the clock you need. The Ethernet module/design might not be receiving any clock for this error.

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FPGA enthusiast!
All PMs will be ignored
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Participant julian.bauer
Participant
1,291 Views
Registered: ‎11-18-2016

Re: ERROR on ETH0 when using ILA Core

Hi,

 

but the problem never happens without using the ILA Core.

 

My workarround is always if the error occures, I delete the ILA Core and place a new one. Then I can generate a new bitstream file in vivado where ethernet is working correctly. I can't generate a secound bitstream file with the same ILA Core.

 

Then I have to close vivado, delete the ila core, place a new ila core and generate bitstream....

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