We have detected your current browser version is not the latest one. Xilinx.com uses the latest web technologies to bring you the best online experience possible. Please upgrade to a Xilinx.com supported browser:Chrome, Firefox, Internet Explorer 11, Safari. Thank you!

Showing results for 
Search instead for 
Did you mean: 
Participant normanlo
Registered: ‎03-01-2017

Sharing memory between PowerPC and Custom IP



I am new to programming in FPGA and would like to some help or point me to the right search.


I am currently working on ISE 13.2 and development board ML 510.


I have a C program that writes some data into a piece of memory, and a custom IP will operate all that pieces of data and write result back to the memory. I am wondering if there are any examples that I can look at ?


I am attaching my hardware design from ISE here. In this simple example, I have a very simple custom IP "dividedby2". My goal is to have the C program running on PowerPC writing data to a range of memory, and have the "dividedby2" IP access that said memory location and perform operations on the data, and write the result back to another memory location.


- Is the hardware design suffice to do what I need. Or do I need to create another memory controller so I can attach it to Port B of the bram ?

- Also, how do I access the memory address from the VHDL code ?


Thank you very much.

0 Kudos