We have detected your current browser version is not the latest one. Xilinx.com uses the latest web technologies to bring you the best online experience possible. Please upgrade to a Xilinx.com supported browser:Chrome, Firefox, Internet Explorer 11, Safari. Thank you!

Showing results for 
Search instead for 
Did you mean: 
Visitor esachdev
Registered: ‎07-25-2017

ZYNQ7000 SPI: Interrupts

I have been looking through the Linux code for the SPI driver for the Zynq7000. The SPI Programming guide in the TRM states:

6. Enable the interrupts: Write 0x27 to spi.Intrpt_en_reg to enable RxFIFO full, RxFIFO overflow, TXFIFO empty, and fault conditions.


However, the spi-cadence.c file states that the ISR is triggered only by: CDNS_SPI_IXR_TXOW (TXFIFO empty) and CDNS_SPI_IXR_MODF (fault conditions) interrupts.


(1) What about the RXFIFO overflow and RXFIFO full scenario?

(2) Is this driver tested at low frequencies?

0 Kudos