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Visitor remcodewit
Registered: ‎08-12-2014

Zynq DMA slave hardware



For a project I'm trying to create a custom peripheral connected to the AXI DMA module. 

Writing data to the peripheral is fine, but reading data from the peripheral doesn't seem to work properly.


Only half of my data seems to get through to the other side. So I'm suspecting my waveforms are wrong, but can´t determine from the documentation (ug1037, pg021, amba4_axi4_stream_v1_0_protocol_spec) what I am doing wrong.

Does anyone have some example VHDL code with a working streaming peripheral I can compare my waveform against?


Kind regards,


Remco de Wit




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Community Manager
Community Manager
Registered: ‎07-23-2012

Re: Zynq DMA slave hardware

Can you please share your AXI DMA configuration? A snapshot of your block design would be handy.
Please mark the post as "Accept as solution" if the information provided answers your query/resolves your issue.

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