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Visitor pckerstet
Registered: ‎02-20-2018

Zynq UG1228 SCLR pg 139

Any advice on how to find the correct forum to post to would be appreciated.   My question is: what is SCLR defined as?  It is mentioned in UG1228 page 139.

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Xilinx Employee
Xilinx Employee
Registered: ‎05-21-2013

Re: Zynq UG1228 SCLR pg 139

SLCR stands for "System-level Control Registers" and are located at 0xF800_0000 through 0xF800_0BFF. These registers control how the configuration of the PS. For example, the MIO pins can by dynamically re-mapped, manage the clocks to the TTCs, etc. See PG201 in Table C-1. Other documents mention the SLCR.

I've done a fair bit of searching and cannot find a reference to "SCLR" and suspect that it is a typo. The reference that you made to page 139 makes sense if the term were "SLCR". Strangely enough, page 138 of the same document calls out the "SLCRs" and defines the term. Usually, Xilinx defines the term the first time it is used in the text as is shown on p138; however, p139 doesn't have this which leads me to think this was just a transposition of characters.

The SLCRs can't just be written to - they are protected by a "locking" mechanism. The must be unlocked, then written to, then re-locked.

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