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Observer ssabogal
Observer
1,341 Views
Registered: ‎09-25-2016

Zynq UltraScale+ Secure Stream Switch Settings

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Hello,

 

I want to perform configuration memory readback via PCAP on the ZU+. I am able to perform readback via ICAP on the ZCU102 and UltraZed platforms, but would like to support PCAP as well.

 

In Table 11-6 and Table 11-7 of the ZU+ TRM (V1.5) [https://www.xilinx.com/support/documentation/user_guides/ug1085-zynq-ultrascale-trm.pdf], I need to set the CSU Secure Stream Switch configuration register (CSU_SSS_CFG) to "PCAP to AXI DMA" (for readback), as opposed to "AXI DMA to PCAP" (for writeback).

 

However, the register value for the "PCAP to AXI DMA" setting is not shown in the Table 11-7. How can I find this value?

 

 

secure_stream_switch.png

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Voyager
Voyager
2,154 Views
Registered: ‎06-24-2013

Re: Zynq UltraScale+ Secure Stream Switch Settings

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Hey @ssabogal,

 

According to UG1087 (CSU) the following CSU_SSS_CFG values should work:

DMA to PCAP    0x00000005
PCAP to DMA    0x00000030
BOTH           0x00000035

Hope this helps,

Herbert

-------------- Yes, I do this for fun!

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Voyager
Voyager
2,155 Views
Registered: ‎06-24-2013

Re: Zynq UltraScale+ Secure Stream Switch Settings

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Hey @ssabogal,

 

According to UG1087 (CSU) the following CSU_SSS_CFG values should work:

DMA to PCAP    0x00000005
PCAP to DMA    0x00000030
BOTH           0x00000035

Hope this helps,

Herbert

-------------- Yes, I do this for fun!

View solution in original post

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