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Observer race
Observer
3,009 Views
Registered: ‎05-18-2017

SDAccel Queries -- work-group size

1. Is there a way to view the generated hardware in SDAccel like Vivado HLS?

 

2. Xilinx recommends using a work-group size of (1, 1, 1). I can write my programs with this size, but the logic then becomes similar to the way kernels are written for C or C++?

Does writing the kernel in OpenCL have any advantages then?

 

Thanks.

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3 Replies
Observer ywu1
Observer
2,981 Views
Registered: ‎05-19-2017

Re: SDAccel Queries -- work-group size

See my answers below:

 

1. Is there a way to view the generated hardware in SDAccel like Vivado HLS?

 

[Jim] Yes. If you run xocc with -s switch, it will keep the temporary files including VHLS project and output. You will be able to anything you can normally do with VHLS.

 

2. Xilinx recommends using a work-group size of (1, 1, 1). I can write my programs with this size, but the logic then becomes similar to the way kernels are written for C or C++?

 

[Jim] Correct.

 

Does writing the kernel in OpenCL have any advantages then?

 

[Jim] With work-group size of 1,1,1, OpenCL kernel is just like C/C++ kernel. 

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Xilinx Employee
Xilinx Employee
2,973 Views
Registered: ‎07-18-2014

Re: SDAccel Queries -- work-group size

IMO writing kernel in OpenCL has few advantages over HLS-C Kernel:

 

1. User can used OpenCL Vectored data type. Equivalent HLS-C kernel is little bit difficult:

OpenCL example of uint16: https://github.com/Xilinx/SDAccel_Examples/tree/master/getting_started/kernel_to_gmem/wide_mem_rw_ocl

C-Kernel example of ap_uint<512>

https://github.com/Xilinx/SDAccel_Examples/tree/master/getting_started/kernel_to_gmem/wide_mem_rw_c

 

2. Utilizing multiple compute units using global size is simpler for OpenCL kernel where has it is not straight forward incase of HLS-C kernel:

OpenCL example of multiple compute units:

https://github.com/Xilinx/SDAccel_Examples/tree/master/getting_started/clk_freq/split_kernel_ocl

C-Kernel based multiple compute unit example:

https://github.com/Xilinx/SDAccel_Examples/tree/master/getting_started/clk_freq/split_kernel_c

 

-Heera

 

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Observer race
Observer
2,944 Views
Registered: ‎05-18-2017

Re: SDAccel Queries -- work-group size

Hi  heera thanks for the reply.

 

My question was oriented towards Vivado HLS (vs) SDAccel.

No big advantages jump out immediately. I guess one can argue about code portability on CPUs, GPUs, FPGAs by using OpenCL but code optimized for FPGA (OpenCL) runs very slowly on CPUs and GPUs. 

I just don't see why xilinx is pushing SDAccel.

 

Queries.

How do I migrate a code from Vivado HLS (uses xilinx fixed-point libraries) to SDaccel. Are there tutorials on that?

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