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Visitor hpbhat_grl
Visitor
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Registered: ‎04-23-2019

Enable only PMA in GTY transceiver

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Hello,

In the transceiver block, is there any option to enable only PMA block and Can I interface my own PCS implemented in FPGA fabric?

For example, I need to use 128B/132B encoding which is not supported by XCVR PMA and I need to use scrambling of different polynomial. In this case, I will implement the PCS in FPGA and want to send the encoded stream to PMA .

My targetting link rate is 20.625Gbps max.

With Regards,

Hariprasad

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Xilinx Employee
Xilinx Employee
62 Views
Registered: ‎08-07-2007

回复: Enable only PMA in GTY transceiver

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hi @hpbhat_grl 

 

May I get any document reference or example design which atleast explains how 64b66b or 8b/10b is mapped to 64 / 8 bit PMA? 

 

Please look at UG578

http://www.xilinx.com/support/documentation/user_guides/ug578-ultrascale-gty-transceivers.pdf

 

Page 113 Figure 3-6 for 8b10b encoding, and page 254 Figure 4-30 for 8b10b decoding

Page119 Figure 3-7 for 64b66b encoding, and page 300 Figure 4-51 for 64b66b decoding

 

Thanks,

Boris

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11 Replies
Moderator
Moderator
155 Views
Registered: ‎07-30-2007

Re: Enable only PMA in GTY transceiver

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The GT is a hardblock and so you don't have access to the PMA by itself.  You can choose to make no changes to the data in the PCS section and pass it in "RAW" mode to the fabric for your own processing.  Some IP does use the GT sucessfully in this manner.  The RAW mode of encoding is on the "basic" tab of the GT wizard.

Roy


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Xilinx Employee
Xilinx Employee
123 Views
Registered: ‎08-07-2007

回复: Enable only PMA in GTY transceiver

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hi @hpbhat_grl 

 

when you customize the GT Wizard IP, you can disable the PCS features, so that only PMA is remained.

 

you can select encoder/decoder to be RAW. This will remove most of PCS features, e.g., comma align, channel bonding, clock correction, etc...

if you don't need the TX buffer and RX buffer, you can bypass them. This can reduce the latency and make sure the latency is deterministic. If you don't need to care about latency, you can leave them there.

 

Thanks,

Boris

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Visitor hpbhat_grl
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Registered: ‎04-23-2019

回复: Enable only PMA in GTY transceiver

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Hi, 

Is there any guideline document which helps me to interface custom PCS to PMA?

For example, PMA user data width is 128-bit. If I implement the 128b/132b encoding, thhen the data width becomes 132bit. How I can map 128bit to encoded 132bit?

Also, channel Bonding is part of PCS. How I can check the lane alignment in receiver side in my custom PCS?

With Regards,

Hariprasad

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Xilinx Employee
Xilinx Employee
107 Views
Registered: ‎08-07-2007

回复: Enable only PMA in GTY transceiver

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hi @hpbhat_grl 

 

For example, PMA user data width is 128-bit. If I implement the 128b/132b encoding, thhen the data width becomes 132bit. How I can map 128bit to encoded 132bit?

- the 128bit to 132bit converter is implemented in fabric logic. you can follow the protocol i think. what procotol is it?

 

Also, channel Bonding is part of PCS. How I can check the lane alignment in receiver side in my custom PCS?

- channel bonding is also implemented by fabric logic. the protocol should define some patterns for channel bonding.

 

Thanks,

Boris

 

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Visitor hpbhat_grl
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Registered: ‎04-23-2019

回复: Enable only PMA in GTY transceiver

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Hi @borisq ,

Protocol is USB3.1. Yes, protocol will tell the 128b to 132bit mapping.

Once encoded, I need to send the encoded data (132-bits) to PMA.

My question is how to interface that encoded 132bit to 128bit of PMA as PMA has the maximum 128bits data interface?

 

With regards,

Hariprasad

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Xilinx Employee
Xilinx Employee
89 Views
Registered: ‎08-07-2007

回复: Enable only PMA in GTY transceiver

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hi @hpbhat_grl 

 

i think if the protocol tells 128b to 132b mapping, it should also tell the 132b to 128b mapping, or just tell it is just reversed, doesn't it?

 

Thanks,

Boris

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Visitor hpbhat_grl
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Registered: ‎04-23-2019

回复: Enable only PMA in GTY transceiver

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Hi,

 

Protocol mentions both the encoding (128b to 132b) and decoding (132b to 128b).

For example, data flow for transmitter (which includes encoder only) looks something like this

User data in USB3.1 (128bit data width)-> 128b to 132b encoder (here, the data width would become 132bits ) -> PMA (128bit only)

In the receiver side, PMA (128bit) -> Decoder (132b to 128bit) -> User data in USB3.1 packets

So, my question talks about the data width mismatch highlighted in Red.

 

With Regards,

Hariprasad 

 

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Xilinx Employee
Xilinx Employee
75 Views
Registered: ‎08-07-2007

回复: Enable only PMA in GTY transceiver

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hi @hpbhat_grl 

 

in the RAW mode, the LSB is transmitted first and MSB is the last. also the LSB is received first and MSB is the last in receiver side.

if you want to send 132bit data beat, you can send 128bit in the current cycle and put the remaining 4 bits + 124bits of the next data beat in the next cycle.

 

like this way...

 

128bits

4bit+124bit

8bit+120bit

....

 

 

Thanks,

Boris

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Visitor hpbhat_grl
Visitor
71 Views
Registered: ‎04-23-2019

回复: Enable only PMA in GTY transceiver

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Hi @borisq ,

I thought the same approach of interfacing the encoded data to PMA.

May I get any document reference or example design which atleast explains how 64b66b or 8b/10b is mapped to 64 / 8 bit PMA? 128b/132b is somewhat new . But, 10G uses 64b/66b and plenty of designs available. Just looking to get required info in the document to have the clear idea of the PCS to PMA path. (Currently I am checking 10G MAC subsystem IP)

 

With Regards,

Hariprasad

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Visitor hpbhat_grl
Visitor
68 Views
Registered: ‎04-23-2019

回复: Enable only PMA in GTY transceiver

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Hi @borisq ,

 

I think I need to enable the gearbox to adapt data width of encoded data and PMA data width

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Xilinx Employee
Xilinx Employee
63 Views
Registered: ‎08-07-2007

回复: Enable only PMA in GTY transceiver

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hi @hpbhat_grl 

 

May I get any document reference or example design which atleast explains how 64b66b or 8b/10b is mapped to 64 / 8 bit PMA? 

 

Please look at UG578

http://www.xilinx.com/support/documentation/user_guides/ug578-ultrascale-gty-transceivers.pdf

 

Page 113 Figure 3-6 for 8b10b encoding, and page 254 Figure 4-30 for 8b10b decoding

Page119 Figure 3-7 for 64b66b encoding, and page 300 Figure 4-51 for 64b66b decoding

 

Thanks,

Boris

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