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Visitor jerry
Visitor
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Registered: ‎04-16-2018

Error for 2 GTPs with 1 GTPE2 in 1 QUAD

In ZYNQ XC7Z015, there is only 1 QUAD, I want to use 2 GTPs with different clock pairs, error occurs: This design requires more GTPE2_COMMON cell..., this design requires 2 of such cell types but only 1 compatible site is available...

When I generate GTP IP cores, I used different clock paths for them:

1.GTP0: REFCLK1_Q0 --> PLL0 --> GTP_X0Y0    (MGTREFCLK0P/N_112)

2.GTP1: REFCLK0_Q0 --> PLL1 --> GTP_X0Y3    (MGTREFCLK1P/N_112)

 

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2018-12-06_200201.png
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1 Reply
Moderator
Moderator
28 Views
Registered: ‎07-30-2007

Re: Error for 2 GTPs with 1 GTPE2 in 1 QUAD

The problem is that both PLL's are contained in the same GTP*_COMMON block.  You need to manually merge the 2 designs.  Putting 2 different protocols into the same quad is beyond the scope of what the GT wizard can handle. 

You would need to take the GTP*_COMMON out of one of the designs and drive its inputs and outputs from the 'common in the other design.  You would also need to make sure the attributes for the in first common the match with it's design.  For instance is you take out the PLL0 'common then in the PLL1 common make sure the PLL0 attributes match the 'common that was removed.

Roy


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