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Visitor
Visitor
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Registered: ‎07-05-2018

GTX Transceiver setup for TX_only HD_SDI video

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Hello,

in my design (Zynq 045) I need to transmit HD-SDI through a GTX transceiver. I started from XAPP1249, run gtwizard for HD-SDI and did all the hacks. I'm only using the SDI and GTX cores to transmit, so I tied all of the input ports for the receiver side to GND and left all of the outputs on the receiver side unconnected.

Now the CPLL is locked, TXOUTCLK output is working at the correct rate (148.5Mhz) and a data stream from uhd-sdi is fed into the GTX data inputs, but the txp/txn pins are still dead.

No ILA debug is available and no simulation is possible in GTX, so I am stuck with no ideas.

What can I check to make sure I have correctly set up the whole SDI-GTX part of the design?

Any suggestion?

Thanks

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Moderator
Moderator
722 Views
Registered: ‎11-09-2015

HI @arcolima,

The xapp1249 should explain how to start the SDI link. If you have used exactly the sane design then you should control everything through the VIOs.

You might want to try the design first with the KC705 make sure it is working properly for you and you understand it (contact your FAE if you need a loaner KC705 or the SDI FMC card).

Then you can move to the Zynq (I assume you already add the xapp with both RX and TX working before removing the RX?)

One note on the VIOs on zynq: you might need to start the zynq from SDK (ex run hello world app from your hdf file) just to have the PS configured and the PS to PL clock to be able to access the VIOs.

Hope that helps,

Regards,


Florent
Product Application Engineer - Xilinx Technical Support EMEA
**~ Don't forget to reply, give kudos, and accept as solution.~**

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Xilinx Employee
Xilinx Employee
745 Views
Registered: ‎03-30-2016

Hello @arcolima

Just wondering. Are you using XAPP1249 ver1.0, ver1.1, or ver1.2 ?
You can check the version of the XAPP you are using by reading readme.txt.

If you are using older version of XAPP1249, please upgrade to the ver1.2.
Since it has some fix for CDC related issues.


Thanks & regards
Leo

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Visitor
Visitor
741 Views
Registered: ‎07-05-2018

Hello  @karnanl,

I am using XAPP1249 version 1.2. I started my design with the plain XAPP files, then I adapted them to my design setting the standard to HD-SDI and removing the RX section, an all that's related to it.

Is there a document or an answer record that explains just the sequence of actions required to wake up and start the TX sections in a fixed standard an a single clock source, with no frills and fancy state machines?

Thanks and regards.

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Highlighted
Moderator
Moderator
723 Views
Registered: ‎11-09-2015

HI @arcolima,

The xapp1249 should explain how to start the SDI link. If you have used exactly the sane design then you should control everything through the VIOs.

You might want to try the design first with the KC705 make sure it is working properly for you and you understand it (contact your FAE if you need a loaner KC705 or the SDI FMC card).

Then you can move to the Zynq (I assume you already add the xapp with both RX and TX working before removing the RX?)

One note on the VIOs on zynq: you might need to start the zynq from SDK (ex run hello world app from your hdf file) just to have the PS configured and the PS to PL clock to be able to access the VIOs.

Hope that helps,

Regards,


Florent
Product Application Engineer - Xilinx Technical Support EMEA
**~ Don't forget to reply, give kudos, and accept as solution.~**

View solution in original post

Highlighted
Visitor
Visitor
531 Views
Registered: ‎07-05-2018
Hi Florent,
I was able to start the GTX transceiver using the example gt_wizard design generated in Vivado, so I'm going on with the debug of my design.
Thanks,
Mauro
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