04-01-2019 03:51 PM - edited 04-01-2019 03:54 PM
There are some properties of the input signal into the transceivers which cause them to be put into an idle-like state and I'm trying to figure out the cause.
My GTY configurations are as such:
I have also attached the DRP register values for all 12 channels and 3 commons being used as .csv files. I have looked at all the registers which involve some electrical idle state and it seems none of them are the incorrect values. Perhaps the answer lies elsewhere...?
04-02-2019 01:02 AM
please can you elaborate "idle state"?
For sure 20dB loss and LPM is wrong: if you are estimating your channel IL to be 20dB, please select DFE.
Vice versa, if your channel is short and IL are low you can select LPM.
04-02-2019 08:00 AM
From my point of view Idle state strikes me as a major flaw. I can only imagine it coming about if
1. The refclk is missing or coming in on the wrong pin.
2. The design is flawed and something important got optimized out.
3. You don't have a valid design.
I think you can eliminate most of these possibilities if you start with an example design and first successfully run the example design simulation. Has this been done?
04-02-2019 03:15 PM - edited 04-02-2019 03:21 PM
By "idle state", I mean that the signal output from the transceivers seem to be highly attenuated towards no signal at all. Resetting the transceivers solves this problem.
What changes to the transceivers would be (forced) propagated if I change the channel IL in the wizard?
04-02-2019 03:41 PM - edited 04-02-2019 03:45 PM
The IL changes AGC inputs and a value over about 15 will invoke DFE equalization whereas lower values will use LPM. It is hard to imagine incorrect IL putting you in IDLE state. Make sure all of your power supplies are withing the operating limits when measured at the FPGA pins. The voltages don't have to droop far before you get no output.
These are CML drivers so you should not be measuring the voltages open ended. Measure on the AC coupling caps near the receiver.
04-03-2019 04:15 PM
04-03-2019 04:25 PM
The equalization is adaptive so it will probably not matter. I'm not sure we support channels with variable IL but if this is a normal temperature induced changes it would be what we are set up for. If you expect worse case is over 15 then you may need DFE. DFE is not for very low loss use so you should probably do some IBIS-AMI simulations and see what works best.
04-11-2019 11:59 AM - edited 04-11-2019 12:00 PM
Observing the outputs of the individual transceivers channels, I noticed that some get stuck at either 0x000...0 or 0xFFF...F when in the trouble state.
04-16-2019 04:14 PM
04-25-2019 05:30 PM
04-26-2019 10:51 AM
I have been only looking at the RX parallel output.
Our front-end is a sensor. It seems that when the signal amplitude into the transceivers changes from one extreme to another that this idle state occurs, otherwise the transceivers operate normally.
One GT wide reset puts the transceivers back into operation, but when the signal again varies from one extreme to another (in most cases in quick succession), then this "idle" state recurs.