How to map UltraScale+ MGT X_Y naming to 127/228 numbering?

[jhegeman]

Dear all,

Is there anyone who can help me understand the mapping between the X_Y-like naming of MGTs in UltraScale+ devices and the numbering that spans 119-133 (for GTYs)? I have tried to find this in the various user guides, but so far without luck. Or am I doing something wrong to think this information is useful?

Best regards,

Jeroen

[karnanl · Accepted solution]

Hello @jhegeman 

One option is to check UG575 Chapter1.
https://www.xilinx.com/support/documentation/user_guides/ug575-ultrascale-pkg-pinout.pdf (Chapter 1)

For Example XCVU13P Bank diagram below :
-- Quad 135 channel0 is X0Y60, Quad 135 channel1 is X0Y61 ... and so on.

Note :
Using this diagram is very helpful, because you can also notice where the RCAL quad for your GTYs.

Thanks & regards
Leo

[borisq]

hi @jhegeman 

In addition, GT Wizard GUI also can show you the mapping as below figure shows.

Thanks,

Boris

[jhegeman]

Hi @karnanl, @borisq,

Thanks! That shows that I should stop skipping to the pin-out section for my FPGA when looking at UG575!

Cheers,
Jeroen