03-23-2018 01:13 PM
I created a GTY location using the Transceivers Wizard Example attempting to run a 1Gbps 8b10b encoded 32bit data set which is expanded to 40bits for the encoding. I send the data into a FIFO which is picked up by the transmit user clock 2. Send through the tx lines and into the rx locations. The recieve then stores into a FIFO and sends back to my system's clock.
System Clock --FIFO-- TX User Clock 2 --------------- Through SMA Cables ------------ RX User Clock 2 --FIFO-- System Clock
Data -----------------------------Data--------------------------Data(8B10B encoded)-------------------------Data(Decoded)--------------Data
I use this set up to test the system to if it is working. I am able to visually see the data in the system using chipscope to confirm each of these locations with a scope to analyze/decode the "Through SMA Cables" section. I can see the data is correctly being transferred through the cables with the proper encoding however the recieve sides improperly decodes the data. How do I set up the receive side to correctly lock on to my K codes? I am sending a constant 4 bytes --> [Data/Data/Data/K.28.5] every send just to be sure to correctly force a good connection however I am not seeing the data link up properly. I have gotten this to work on a GTX connection on a VC707 board but am having problems with GTY on the VCU118 board.
Vivado = 2017.2
Board = VCU118
FPGA = VU9P
GTY reference clock = 200Mhz
TX/RX speed settings = 1Gbps
AK38 MGTREFCLK0P_121 FMCP_HSPC_GBT0_0_P 1 Q0 U40 ICS85411A clock buffer
AK39 MGTREFCLK0N_121 FMCP_HSPC_GBT0_0_N 2 NQ0
AT42 MGTYTXP0_121 FMCP_HSPC_DP0_C2M_P C2 DP0_C2M_P
AT43 MGTYTXN0_121 FMCP_HSPC_DP0_C2M_N C3 DP0_C2M_N
AR45 MGTYRXP0_121 FMCP_HSPC_DP0_M2C_P C6 DP0_M2C_P
AR46 MGTYRXN0_121 FMCP_HSPC_DP0_M2C_N C7 DP0_M2C_N
^FMC breakout board to loop back TX to RX and put in the GTY reference clock.
K Code = K.28.5 --> BC Correctly being sent every clock in the lowest most byte.
Any suggestions on what to change to properly decode the data?
03-23-2018 05:37 PM
Do you have the RX alignment comma set to match your K28.5 character?
Check in the GT wizard -> Optional Features -> Receiver comma detection and alignment.
03-23-2018 05:52 PM
Yes I have enabled that. When I click on Detect Value for K28.5 the results is the image attached.
Plus Comma --> 0101111100
Minus Comma --> 1010000011
Which I believe is the correct set up for the K28.5
03-23-2018 06:09 PM
The K28.5 settings are correct.
If I read it correctly, you have the TX and RX of the same lane, with shared reference clock, and you are using a SMA cable to loopback externally from TXP/N to RXP/N?
Check RXBYTEISALIGNED, RXBYTEREALIGN, and RXCOMMDET to see if RX is recognizing the comma characters and if any realignment is performed.
If you change alignment boundary to "any byte boundary", is there any difference?
04-02-2018 02:23 PM
Thanks for the help I was able to get it working. I found that that these pins were not initially created in my example design.
Most likely do to the original set up of the ip core when I created the example design. But once these are set to enabled the system worked great being able to transmit and receive correctly.
04-02-2018 02:40 PM
If the example design is opened from a xci which has comma alignment enabled, the example design should have these ports connected correctly for you. Perhaps the xci was re-customized afterwards and the example design was not regenerated.
Let us know if you are seeing issues with the example design and we can look into it for you.