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Visitor
Visitor
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Registered: ‎03-18-2017

What does 'biased' mean for MGTXRXP/N pin on Table 5-7 of 7 series ug476?

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Hello,

 

I am not clear how to route for unused GTX RX pin pairs.

According to Table 5-7 of ug476 for 7 Series, there are two way for unused GTX RX pairs

 

If a receiver is not used and not biased, connect the associated pin pair to
ground. If the receiver is not used but biased, leave the pin pair unconnected.

 

I do not understand clearly what 'biased' means?

 

There are 7 Quad GTX transceiver on XC7K480T, FFG901 package.

- All of 4 Quad GTX on same power group(G10) are not used, so I left all related pins unconnected. (Power pins are also unconnected)

- There 5 unused GTX ports on power group G11. 

   -. All ports of MGT117 bank are not used.

   -. One port of MGT116 bank is not used. The other three ports are used.

 

I need to know better way for 5 unused rx pairs.

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Xilinx Employee
Xilinx Employee
2,857 Views
Registered: ‎02-14-2014

Hi @naksoo,

 

To clarify this jargon 'biased', you can simply read the statement as "If a receiver is not used and not powered, connect the associated pin pair to ground. If the receiver is not used but powered, leave the pin pair unconnected." 

 

There is a common mode voltage associated with the receiver when it is powered (This defines the 'biased condition).If the GT is instantiated it will be powered.If these inputs are grounded you shouldn't instantiate the GT. 

Hope this clarifies.

Regards,
Ashish
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Xilinx Employee
Xilinx Employee
2,858 Views
Registered: ‎02-14-2014

Hi @naksoo,

 

To clarify this jargon 'biased', you can simply read the statement as "If a receiver is not used and not powered, connect the associated pin pair to ground. If the receiver is not used but powered, leave the pin pair unconnected." 

 

There is a common mode voltage associated with the receiver when it is powered (This defines the 'biased condition).If the GT is instantiated it will be powered.If these inputs are grounded you shouldn't instantiate the GT. 

Hope this clarifies.

Regards,
Ashish
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Visitor
Visitor
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Registered: ‎03-18-2017

Hello Ashish,

Thanks for fast reply.

 

I want to check two points.

1> The 'powered' means that common mode voltage is powered, not means that analog power supply(MGTAVCC, MGTAVTT, MGTVCCAUX)  is powered?

 

2> When is receiver biased?

I checked VC709 evaluation board schematic.

When all four ports on quad GTX transceiver are not used, the four receivers are connected to ground.

When some ports of quad GTX are used, the other unused port are unconnected.

Is received biased when other ports on same Quad GTX are used?

 

 best regards,

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Xilinx Employee
Xilinx Employee
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Registered: ‎02-14-2014

Hello @naksoo,

 

The 'powered' means that common mode voltage is powered, not means that analog power supply(MGTAVCC, MGTAVTT, MGTVCCAUX)  is powered?

 

--> Yes this is correct.

 

2> When is receiver biased?

 

--> The receiver gets biased when channel is instantiated in the design.

Regards,
Ashish
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Newbie
Newbie
1,692 Views
Registered: ‎01-31-2018

Hello

Now I am facing the same design problem.Can you tell me how you deal with it?

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Moderator
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Registered: ‎02-16-2010
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