cancel
Showing results for 
Show  only  | Search instead for 
Did you mean: 
5,091 Views
Registered: ‎07-16-2008

atmel spi flash AT45DB161D inditect programming failed

Jump to solution

i use the spartan 6 lx45, when program the SPI flash with iMPACT tool, the error message jumped and program failed.

I paste the error message here:

-----------------------------------------------------------------------------------------------------------------------------------------------

INFO:iMPACT - Current time: 2014/10/10 13:28:11
// *** BATCH CMD : Program -p 1 -spionly -e -v -loadfpga
PROGRESS_START - Starting Operation.
Maximum TCK operating frequency for this device chain: 25000000.
Validating chain...
Boundary-scan chain validated successfully.
'1': SPI access core not detected. SPI access core will be downloaded to the device to enable operations.
INFO:iMPACT - Downloading core file C:/Xilinx/13.1/ISE_DS/ISE/spartan6/data/xc6slx45_spi.cor.
'1': Downloading core...
 LCK_cycle = NoWait.
LCK cycle: NoWait
done.
'1': Reading status register contents...
INFO:iMPACT:2219 - Status register values:
INFO:iMPACT - 0010 0100 0100 1000
INFO:iMPACT:2492 - '1': Completed downloading core to device.
INFO:iMPACT - '1': Flash was not programmed successfully.
PROGRESS_END - End Operation.
Elapsed time =      5 sec.

--------------------------------------------------------------------------------------------------------------------------------------------------

 

 

and i attach the schematic here

 

0 Kudos
Reply
1 Solution

Accepted Solutions
6,412 Views
Registered: ‎07-16-2008

i found the Burt's solution and fixed this problem. thanks to Burt.

 

Hai

 

refer to:

 

Solved my own problem.

 

A load on the DONE signal was dragging it down to an indeterminate state. fpga thought it was DONE but wouldn't release the INIT line. This stopped everything else. Disconnecting the external load fixed everything.

 

 

Burt.

View solution in original post

0 Kudos
Reply
3 Replies
5,089 Views
Registered: ‎07-16-2008

is there anybody can help me to do the next debugging to find te root cause?

 

thanks,

 

Hai

0 Kudos
Reply
Moderator
Moderator
5,080 Views
Registered: ‎01-15-2008

can you try with latest impact tool and see if this helps

http://www.xilinx.com/support/download/index.html/content/xilinx/en/downloadNav/design-tools.html

 

--Krishna

 

 

0 Kudos
Reply
6,413 Views
Registered: ‎07-16-2008

i found the Burt's solution and fixed this problem. thanks to Burt.

 

Hai

 

refer to:

 

Solved my own problem.

 

A load on the DONE signal was dragging it down to an indeterminate state. fpga thought it was DONE but wouldn't release the INIT line. This stopped everything else. Disconnecting the external load fixed everything.

 

 

Burt.

View solution in original post

0 Kudos
Reply