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Registered: ‎11-27-2008

how to FPGA configuration ios such as DONE

 I make a fpga broad, however i just use a fpga without EPROM. Now i use JTAG to download my programs.   I do not know how to use the configuration ios in the fpga such as DONE, HSWP, PROB, INIT_B  and M[2:0]

THOSE PINS will be connect with vCC OR GND, OR N.C, I DO NOT KNOW.


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Xilinx Employee
Xilinx Employee
Registered: ‎06-24-2008



The best place for configuration related questions is the appropriate configuration user guide.

I am not sure which device you use here but here is the Spartan-3 User Guide as a reference:


To answer your questions:

DONE: this will indicated if configuration was successfull. The IO is an open-drain driver and has to be pulled high with an external resistor

HSWAP: This will switch on/off the pre-configuration pull-ups ('0' - enabled; '1'-disabled). Pull this high or low depending on requirement

PROG_B: This is the "hard reset" of the FPGA. Pulsing PROG_B "low" will erase the FPGA and restart configuration. This IO has to be pulled up.

INIT_ B: This signal can be used to delay configuration and will also indicate a "CRC" error during configuration. The IO is an open drain driver that has to be pulled-up.

M[2:0]: Those pins select the configuration mode. JTAG is always available regardless of the mode pin settings. But if only JTAG is used to configure the device and no alternative configuration modes are needed this should be set to "JTAG" (check appropriate User Guide for Mode pin settings).


You will find example schematics in the appropriate User Guide for different configuration modes.

They arealso a good reference for your question.



I hope this helps!



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