Hi All,
I have some troubles with a compilation of the axi_apb_bridge_v3_0_vh_rfs.vhd (APB Bridge IP).
Here is the command, which I try to run from Questa:
%> vcom -work axi_apb_bridge_v3_0_14 -64 -93 "srcs/ip/axi_bd/axi_apb_bridge_v3_0_14/axi_apb_bridge_v3_0_vh_rfs.vhd"
Here is the error message:
# vcom -reportprogress 300 -work axi_apb_bridge_v3_0_14 -64 -93 srcs/ip/axi_bd/axi_apb_bridge_v3_0_14/axi_apb_bridge_v3_0_vh_rfs.vhd
# -- Loading package STANDARD
# -- Loading package TEXTIO
# -- Loading package std_logic_1164
# ** Error: srcs/ip/axi_bd/axi_apb_bridge_v3_0_14/axi_apb_bridge_v3_0_vh_rfs.vhd(110): (vcom-1598) Library "unisim" not found.
# ** Error: srcs/ip/axi_bd/axi_apb_bridge_v3_0_14/axi_apb_bridge_v3_0_vh_rfs.vhd(111): (vcom-1136) Unknown identifier "unisim".
# ** Note: srcs/ip/axi_bd/axi_apb_bridge_v3_0_14/axi_apb_bridge_v3_0_vh_rfs.vhd(131): VHDL Compiler exiting
# End time: 13:55:57 on Apr 17,2019, Elapsed time: 0:00:00
# Errors: 2, Warnings: 1
# C:/questasim64_10.7/win64/vcom failed.
It says that the "unisim" library is missing... I've found many "unisim" directories on my PC:
C:\Xilinx\Vivado\2018.3\data\parts\xilinx\rtl\lib\vhdl\xst\unisim\arch.vho
C:\Xilinx\Vivado\2018.3\data\parts\xilinx\rtl\lib\vhdl\xst\unisim\hdllib.ref
C:\Xilinx\Vivado\2018.3\data\parts\xilinx\rtl\lib\vhdl\xst\unisim\hdpdeps.ref
C:\Xilinx\Vivado\2018.3\data\precomp\common\vhd\unisim\unisim.vdbl
C:\Xilinx\Vivado\2018.3\data\precomp_hsv\vhdl\unisim\unisim.vdbl
C:\Xilinx\Vivado\2018.3\data\xsim\vhdl\unisim\unisim.vdbl
C:\Xilinx\Vivado\2018.3\data\precomp\common\vhd\unisim\unisim.vdbx
C:\Xilinx\Vivado\2018.3\data\precomp_hsv\vhdl\unisim\unisim.vdbx
C:\Xilinx\Vivado\2018.3\data\xsim\vhdl\unisim\unisim.vdbx
So, how to fix the compilation error for the axi_apb_bridge_v3_0_vh_rfs.vhd (APB Bridge IP) ?
Thank you!
