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Observer
Observer
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Registered: ‎05-10-2018

Error: "[XSIM 43-3980] The SystemVerilog feature "non-integral typedef or member of a struct/union" is not supported yet for simulation.

I am getting this error in regards to a multi-dimensional array as an input to a module, only in one particular module in my design though. Most modules in my design have multi-dimensional IO ports, but I am only getting this error for this one particular file. One other module has nearly identical IO ports and gives no errors....so this is really absurd.

Here is the code:

module wont_compile(
    //Clocking
    input i_clk,
    //Reset
    input i_reset,
    //Test Parameters
    input [7:0] i_sig1 [5:0],
    input [7:0] i_sig2 [5:0],
    input [7:0] i_sig3 [1:0],
    input [7:0] i_sig4 [1:0],
    //Data Interface
    output logic [31:0] data
    );

Error occurs with any of the 4 i_sig signals. I am using multi-dimensional arrays as IO in plenty of other places in my design, so why is this giving an error?

Thanks

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Moderator
Moderator
425 Views
Registered: ‎05-31-2017

Re: Error: "[XSIM 43-3980] The SystemVerilog feature "non-integral typedef or member of a struct/union" is not supported yet for simulation.

Hi @dpikul ,

Can you please share the complete test case to reproduce the issue ?

 

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