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544 Views
Registered: ‎09-01-2014

Error while Compiling Simulation libraries to Aldec Riviera pro

Hi,

Created a design in Vivado 2018.1 and Compiled the Simulation libraries to Riviera Pro 2018.1 and got the below errors.

Compiling verilog library 'audio_tpg_v1_0_0'...ERROR: [Common 17-180] Spawn failed: No such file or directory
ERROR: [Common 17-180] Spawn failed: No such file or directory.

I have checked the audio_tpg_v1_0_0 folder and all required files are present still it is giving the same error.

Please do the needful.

 

Thanks in advance.

Screenshot (35).png
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3 Replies
graces
Moderator
Moderator
500 Views
Registered: ‎07-16-2008

For Vivado 2018.1, the compatible Aldec Riviera Pro version is 2017.10. It would be best to try out in compatible version to avoid unexpected issues.

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460 Views
Registered: ‎09-01-2014

Hi Graces,

Thanks for the reply.I have changed my vivado version to 2019.1 as it iscompatible with my Riviera Pro. After that i have exported my xilinx design HDL files and Compiled libraries to Riviera Pro.

Now how do i import the .elf generated using Xilinx SDK to other simulators like Riviera Pro from vivado.

Thanks in Advance.

 

 

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graces
Moderator
Moderator
415 Views
Registered: ‎07-16-2008

What simulation would you like to perform? For hardware simulation, you can run export_simulation (Vivado tcl command) to export a simulation script of the current design for supported 3rd party simulator.

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Don’t forget to reply, kudo, and accept as solution.
If starting with Versal take a look at our Versal Design Process Hub and our Versal Blogs.
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