11-04-2019 03:21 AM
Created a design in Vivado 2018.1 and Compiled the Simulation libraries to Riviera Pro 2018.1 and got the below errors.
Compiling verilog library 'audio_tpg_v1_0_0'...ERROR: [Common 17-180] Spawn failed: No such file or directory
ERROR: [Common 17-180] Spawn failed: No such file or directory.
I have checked the audio_tpg_v1_0_0 folder and all required files are present still it is giving the same error.
Please do the needful.
Thanks in advance.
11-04-2019 05:59 PM
For Vivado 2018.1, the compatible Aldec Riviera Pro version is 2017.10. It would be best to try out in compatible version to avoid unexpected issues.
11-07-2019 09:26 PM
Thanks for the reply.I have changed my vivado version to 2019.1 as it iscompatible with my Riviera Pro. After that i have exported my xilinx design HDL files and Compiled libraries to Riviera Pro.
Now how do i import the .elf generated using Xilinx SDK to other simulators like Riviera Pro from vivado.
Thanks in Advance.
11-10-2019 05:20 PM
What simulation would you like to perform? For hardware simulation, you can run export_simulation (Vivado tcl command) to export a simulation script of the current design for supported 3rd party simulator.