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chevalier
Mentor
Mentor
8,180 Views
Registered: ‎10-07-2011

Library compilation order

Hi,

 

I have a design that is using a lot of Vivado 2013.4 IPs. Vivado delivers IPs as a bunch of encrypted HDL files organized in libraries. If I'm right, these files and libraries are available in the ...\data\ip\interfaces and ...\data\ip\xilinx subfolders of the Vivado installation folder.

 

At this time, each time an IP is generated, I have to compile all the libraries that it delivers. The problem is that I don't know which library to compile first, then which one to compile next and so on.

 

For VHDL, and within the scope of a given IP, I know I can find the library associated with each file using the script below:


# Get the list of files required for simulation
set ip_files [get_files -compile_order sources -used_in simulation -of_objects [get_files MyIP.xci]
# For each of these files, get the library information
foreach file $ip_files {
  puts "[get_property LIBRARY $file] $file"
}

 

But this works only for a given IP. Is there a way to find out what the compilation order shall be for **ALL** libraries, such that I can pre-compiled them once and for all? That would really simplify things at the simulation level.

 

Could/Can  Xilinx specify what the library compilation order is for everything in the data/ip subfolders?

 

Thanks!

 

Claude

 

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6 Replies
debrajr
Moderator
Moderator
7,647 Views
Registered: ‎04-17-2011

This post is old now, was the issue resolved at your end? Do you still need any assistance?
Regards,
Debraj
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chevalier
Mentor
Mentor
7,640 Views
Registered: ‎10-07-2011

Hello Debraj,

 

As of 2014.1, I'm still looking for an efficient way to do that. Didn't try 2014.2 yet.

 

The problem arises because I'm using a third-party simulator. It would really help if Vivado has a command to create either a Tcl or DO script to automate compilation of all the libraries from the ...\data\ip\interfaces and ...\data\ip\xilinx subfolders of the Vivado installation folder.

 

That would allow us to pre-compile all the Vivado libraries within our simulator environment, once and for all.

 

Thanks for helping!

 

Claude

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kef2189
Observer
Observer
7,187 Views
Registered: ‎02-18-2010

I'm having a similar problem.  Did this ever get resolved?

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ultimiller
Visitor
Visitor
6,324 Views
Registered: ‎12-05-2014

I'm also looking for the same thing.  All we would need is a list of the compile order to compile every IP core's simulation files.  It's next to impossible for users to create that on our own.  Currently the only way we can get any simulations to run (VCS) is to:

1. Build the Vivado project

2. Genarate either simulation outputs to get the shell script, or generate output products for the project to get the prj file.

3. Parse/run the compile script for the IP cores used.

 

This adds minutes to every simulation that we run, which is unacceptable.  We need a method to precompile these libraries once per release like we had with compxlib.

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graces
Moderator
Moderator
6,261 Views
Registered: ‎07-16-2008

Pre-compiled IP static files are on the roadmap. Hopefully it will be enabled in 2015.3.

Currently the IP simulation models are delivered in IP output product generation.

 

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chevalier
Mentor
Mentor
2,486 Views
Registered: ‎10-07-2011

Hello all,

 

It's been a while since I posted the original message. Since then, I had private talk with some Xilinx folks. They said precompiled libraries would be provided starting with 2016.1 but that didn't happen.

 

Xilinx, the need still remains. When the IPs are generated, all the underlying stuff is COPIED from the {Vivado Installation Folder}\data\ip\xilinx folder. Things like axi_utils_2_0, xbip_util_3_0, etc... The generate process is not modifying those files at all. This means they could all easilly be pre-compiled once and for all using my own (Active-HDL) simulator.

 

But there are a lot of dependencies between those libraries such that is is very hard to establish the LIBRARY compilation order. Finding the FILE compilation order within a library is not a problem. Only the LIBRARY compilation order.

 

Xilinx, could you just provide that compilation order???

 

Thanks!

 

Claude

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