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Visitor
Visitor
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Registered: ‎02-04-2020

My Behavioral Simulation takes too much time

I have BASYS 3 with artix 7 fpga.

this is my testbench code:

library ieee;
use ieee.std_logic_1164.all;

entity tb_TimerxCounter is
end tb_TimerxCounter;

architecture tb of tb_TimerxCounter is

component TimerxCounter
port (Clock_in : in std_logic;
Clock_out_1kHz : out std_logic;
Clock_out_1Hz : out std_logic);
end component;

signal Clock_in : std_logic;
signal Clock_out_1kHz : std_logic;
signal Clock_out_1Hz : std_logic;

begin

dut : TimerxCounter
port map (Clock_in => Clock_in,
Clock_out_1kHz => Clock_out_1kHz,
Clock_out_1Hz => Clock_out_1Hz);

stimuli : process
begin
-- EDIT Adapt initialization as needed
Clock_in <= '0';

-- EDIT Add stimuli here
Clock_in <= not Clock_in after 100 ns;
wait;
end process;

end tb;

-- Configuration block below is required by some simulators. Usually no need to edit.

configuration cfg_tb_TimerxCounter of tb_TimerxCounter is
for tb
end for;
end cfg_tb_TimerxCounter;

 

But when i run Behavioral simulation, It takes forever!!! plz help i can't do anything with it...

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3 Replies
Highlighted
372 Views
Registered: ‎06-21-2017

What is the time increment on your simulation?  I think most simulators are defaulting to 1pS.  If you change this to 1nS, the simulation will run faster.  Be aware that many Xilinx primitives need to be run with a 1pS simulation time increment, so this may only work on simple simulations.

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Visitor
Visitor
366 Views
Registered: ‎02-04-2020

i don't know

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Highlighted
Moderator
Moderator
138 Views
Registered: ‎09-15-2016

Hi @zaahm18 ,

Can you please share the test case to check this issue at our end? Also which version of Vivado are you using?

Thanks & Regards,
Sravanthi B
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