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Visitor thotuvicat
Visitor
2,694 Views
Registered: ‎02-22-2012

ROM 12 bits wide 2**10 deep

Hi All

 

I am getting the following error when trying to simulate a ROM in ISE:

 

 

ERROR:HDLCompiler:410 - "Font_Rom.vhd" Line 19. Expression has 8 elements ; expected 12
ERROR:Simulator:777 - Static elaboration of top level VHDL design unit tb_font_rom2 in library work failed

 

 

The offending code is as follows:

 

 

entity Font_Rom is
    generic (   Address_Width : integer := 10;
                BITS    : integer := 12  );

    port    (   addr: in std_logic_vector((Address_Width - 1) downto 0);
                q: out std_logic_vector((BITS - 1) downto 0));
end Font_Rom;


architecture arch of Font_Rom is

subtype q_out is std_logic_vector((BITS-1) downto 0);
type RomType is array(((2**Address_Width)-1) downto 0) of q_out;

signal FONTROM : RomType := (     -- This is line 19


x"022",

 

 

If anyone can help me with this problem I would greatly appreciate it.

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1 Reply
Teacher rcingham
Teacher
2,685 Views
Registered: ‎09-09-2010

Re: ROM 12 bits wide 2**10 deep

Post all of "Font_Rom.vhd", without edits.

------------------------------------------
"If it don't work in simulation, it won't work on the board."
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