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Scholar
Scholar
3,090 Views
Registered: ‎04-07-2008

Simulation error

 

 

Hi,

 

 

My simulator errors on the red lettered locations.  Does anyone have an idea what I need to do.

 

Perhaps it needs to point to a library?

 

Thank you,

  Gary

 

 

This is code from xapp1014..  file kcpsm3_edh.v

 

 

 

 

 

genvar spm_index;

generate
    if (KCPSM_SPM_SIZE <= 16)
        for (spm_index=0; spm_index < 8; spm_index = spm_index + 1)
            begin : spmbit
                 // synthesis translate_off 
                 defparam spmbit[spm_index].memory_bit.INIT = 16'h0000;
                 // synthesis translate_on
                 RAM16X1S memory_bit (
                 .D(sx[spm_index]),
                 .WE(memory_enable),
                 .WCLK(clk),
                 .A0(second_operand[0]),
                 .A1(second_operand[1]),
                 .A2(second_operand[2]),
                 .A3(second_operand[3]),
                 .O(memory_data[spm_index]))/* synthesis xc_props = "INIT=0000"*/;

                 FD store_flop (
                 .D(memory_data[spm_index]),
                 .Q(store_data[spm_index]),
                 .C(clk));
            end
    else if (KCPSM_SPM_SIZE <= 32)     
        for (spm_index=0; spm_index < 8; spm_index = spm_index + 1)
            begin : spmbit
                 // synthesis translate_off 
                 defparam spmbit[spm_index].memory_bit.INIT = 32'h00000000;
                 // synthesis translate_on
                 RAM32X1S memory_bit (
                 .D(sx[spm_index]),
                 .WE(memory_enable),
                 .WCLK(clk),
                 .A0(second_operand[0]),
                 .A1(second_operand[1]),
                 .A2(second_operand[2]),
                 .A3(second_operand[3]),
                 .A4(second_operand[4]),
                 .O(memory_data[spm_index]))/* synthesis xc_props = "INIT=00000000"*/;

                 FD store_flop (
                 .D(memory_data[spm_index]),
                 .Q(store_data[spm_index]),
                 .C(clk));
            end
    else
        for (spm_index=0; spm_index < 8; spm_index = spm_index + 1)
            begin : spmbit
                 // synthesis translate_off
                 defparam spmbit[spm_index].memory_bit.INIT = 64'h0000000000000000;
                 // synthesis translate_on
                 RAM64X1S memory_bit (
                 .D(sx[spm_index]),
                 .WE(memory_enable),
                 .WCLK(clk),
                 .A0(second_operand[0]),
                 .A1(second_operand[1]),
                 .A2(second_operand[2]),
                 .A3(second_operand[3]),
                 .A4(second_operand[4]),
                 .A5(second_operand[5]),
                 .O(memory_data[spm_index]))/* synthesis xc_props = "INIT=0000000000000000"*/;

                 FD store_flop (
                 .D(memory_data[spm_index]),
                 .Q(store_data[spm_index]),
                 .C(clk));
            end
endgenerate

 

 

 

 

 

alog -O2 -l secureip -l unisims_ver -sve  -work VR_SDI_JUN22B $dsn/src/kcpsm3_edh.v
# Warning: The source is compiled without the -dbg switch. Line breakpoints and code coverage will not be available.
# Compile...
# Pass 1. Scanning modules hierarchy.
# Info: VCP2113 Module \$root found in current working library.
# Error: VCP7270 kcpsm3_edh.v : (1553, 72): Generate item 'spmbit[spm_index].memory_bit.INIT' cannot be found.
# Error: VCP7270 kcpsm3_edh.v : (1574, 76): Generate item 'spmbit[spm_index].memory_bit.INIT' cannot be found.
# Error: VCP7270 kcpsm3_edh.v : (1596, 84): Generate item 'spmbit[spm_index].memory_bit.INIT' cannot be found.
# Info: VCP2110 Module FDS found in library unisims_ver.

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2 Replies
Highlighted
Professor
Professor
3,087 Views
Registered: ‎08-14-2007

Re: Simulation error

It looks like your simulator may be having a problem with the hierarchical name in this

case.  What simulator are you using?  Perhaps it doesn't construct the module hierarchy

name from the generate process name the same way as the simulator used by the creator

of this code.

 

One workaround is to change the instantiations to Verilog 2001 style like:

 

RAM16X1S
#(
  .INIT  (16'h0000)
)
memory_bit (
                 .D(sx[spm_index]),

etc.

 

and leave out the defparam statements.

 

-- Gabor

-- Gabor
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Highlighted
Scholar
Scholar
3,079 Views
Registered: ‎04-07-2008

Re: Simulation error

Thank You Gabor

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