04-10-2014 10:32 PM
This is my code to generate a triangular wave form, but how I do to try it in Xilinx ISE Project Navigator in the simulator? I don't have the Nexys 3 because my university is close for the Holy Week, please let me know if my code works!
entity Triangular is
clk : in std_logic;
n : in integer;
op : out integer
architecture Behavioral of Triangular is
variable count : integer:=0;
variable s : std_logic:='0';
if RISING_EDGE(clk) then
count := count + 1;
if(count>=n/2) then count:=0;
s := NOT s;
op <= count*255/n;
op <= 127-count*255/n;
Thanks for your help! :)
04-11-2014 03:06 AM
you don't need a board to do simulations.
Even the ISIM light that comes with the webpack is sufficient for such a small model.
The code might actually work for simulation, maybe rising_edge should be written in lower case letters. (emacs had problems with the formatting)
The code won't synthesize since dividing can only be done by some 2^n value, not just any integer.
Also there are several other minor issues:
(unconstrained integer ports, lots of combinatorical stuff behind the synchronous assignment etc.)
Maybe you should take a look at the ISE language templates for a loadable up/down counter.
Also learning about signed and unsigned data types (numeric_std) can be helpful.
Have a nice synthesis
04-11-2014 11:16 PM