cancel
Showing results for 
Show  only  | Search instead for 
Did you mean: 
a4speaker
Voyager
Voyager
500 Views
Registered: ‎06-19-2014

UART lite IP halts reading after data is transmitted

Jump to solution

I am using vivado 2019.2 with windows 10 and modelsim simulator.

As you can see in attached figure, On the read channels, status register is read continuously. 

When a byte is written in write channel, s_axi_arready signal stops coming from UART core which halts all operation.

Why after writing to tx_fifo, the core stops responding on read channel? Will the same happen in hardware or is this just happening in simulation?

Tags (2)
uart.JPG
0 Kudos
1 Solution

Accepted Solutions
a4speaker
Voyager
Voyager
469 Views
Registered: ‎06-19-2014

You are right. But I was confused in first figure because IP is reading status register ofcourse because IOs comply AXI protocol. Anyways, I am attaching second figure which is working correctly.

View solution in original post

uart.JPG
0 Kudos
2 Replies
dgisselq
Scholar
Scholar
476 Views
Registered: ‎05-21-2015

@a4speaker ,

You might wish to update your AXI master and make your its actions protocol compliant first.  ARVALID should remain high until both ARVALID && ARREADY are true.  During this time, none of the other AR* signals should change.  The same needs to be true for the other handshakes as well: AW*, W*, etc.

Dan

0 Kudos
a4speaker
Voyager
Voyager
470 Views
Registered: ‎06-19-2014

You are right. But I was confused in first figure because IP is reading status register ofcourse because IOs comply AXI protocol. Anyways, I am attaching second figure which is working correctly.

View solution in original post

uart.JPG
0 Kudos