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Explorer
Explorer
1,112 Views
Registered: ‎03-23-2015

Unimacros not showing up in simulation?

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Hello,

 

I have always liked unimacros since they allow to easily instantiate simple primitives without any other files (XCI, etc).

 

However, when I instantiate a unimacro in my design (the BRAM_TDP_MACRO to be precise) the instance does not show up on my simulation hierarchy in the "Scope" tab in Vivado.

 

I thought it might have to do with the fact that I have a mix of SystemVerilog-VHDL in my design, however I placed the instance on the top-level of the hierarchy and still nothing.. everything else is there, but the bram that should be instantiated with the unimacro is not...

 

Is this just me? Is this a known-issue?

 

Thanks

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1 Solution

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Moderator
Moderator
1,799 Views
Registered: ‎09-15-2016

Re: Unimacros not showing up in simulation?

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hi @arquer

 

Check similar issue. Hope this helps:

https://forums.xilinx.com/t5/Simulation-and-Verification/bram-tdp-marco-missing-when-instantiated-in-Vivado/td-p/511083

 

Regards

Rohit

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Regards
Rohit
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4 Replies
Voyager
Voyager
1,100 Views
Registered: ‎06-24-2013

Re: Unimacros not showing up in simulation?

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Hey @arquer,

 

Are you sure that the BRAM didn't just get removed (optimized away) by the tools?

You might want to place a DONT_TOUCH on it or at least a MARK_DEBUG on relevant networks.

 

Best,

Herbert

-------------- Yes, I do this for fun!
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Explorer
Explorer
1,090 Views
Registered: ‎03-23-2015

Re: Unimacros not showing up in simulation?

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I am sure that is not the case because I actually see the signals comming from the BRAM changing...

 

Full disclousure:

1. The BRAM is inside a generate loop

2. The BRAM is instantiated in Verilog but upper levels of the hierarchy are VHDL

 

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Moderator
Moderator
1,800 Views
Registered: ‎09-15-2016

Re: Unimacros not showing up in simulation?

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hi @arquer

 

Check similar issue. Hope this helps:

https://forums.xilinx.com/t5/Simulation-and-Verification/bram-tdp-marco-missing-when-instantiated-in-Vivado/td-p/511083

 

Regards

Rohit

----------------------------------------------------------------------------------------------
Kindly note- Please mark the Answer as "Accept as solution" if information provided is helpful.

Give Kudos to a post which you think is helpful and reply oriented.
----------------------------------------------------------------------------------------------

 

Regards
Rohit
----------------------------------------------------------------------------------------------
Kindly note- Please mark the Answer as "Accept as solution" if information provided is helpful.

Give Kudos to a post which you think is helpful and reply oriented.
----------------------------------------------------------------------------------------------

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Explorer
Explorer
1,056 Views
Registered: ‎03-23-2015

Re: Unimacros not showing up in simulation?

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Thanks @thakurr

 

using the "--debug all" option during elaboration solved the issue. I have to say simulation is much slower now though, but I guess everything comes at a price..

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