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Visitor tgeng
Visitor
4,432 Views
Registered: ‎12-01-2011

V6 GTX IP simulation error

I am trying to simulation a GTX IP generated from ISE but got following error:

 

Error-[URMI] Unresolved modules

/tools/Xilinx/ISE/13.2/ISE_DS/ISE/verilog/src/unisims/GTXE1.v, 2736

"B_GTXE1_INST"

  Module definition of above instance is not found in the design.

 

Below is the command I used for VCS compile:

 

vcs +vcs+lic+wait -full64 +v2k \

         +lint=all,noTMR,noVCDE,noXZVLC,noUI,noVNGS,noONGS \

         -notice \

         -lca \

  +nospecify +error+500 \

         +notimingcheck \

  ../../../pciephy_gtx.v \

  ../../../pciephy.v \

  ../../example_design/frame_gen.v \

  ../../example_design/frame_check.v \

  ../../example_design/pciephy_top.v \

  ../demo_tb.v \

  /tools/Xilinx/ISE/13.2/ISE_DS/ISE/verilog/src/glbl.v \

  +libext+.v \

  -y /tools/Xilinx/ISE/13.2/ISE_DS/ISE/verilog/src/unisims \

  -y /tools/Xilinx/ISE/13.2/ISE_DS/ISE/verilog/src/simprims \

  -y /tools/Xilinx/ISE/13.2/ISE_DS/ISE/verilog/src/iSE \

  -y /tools/Xilinx/ISE/13.2/ISE_DS/ISE/verilog/src/uni9000 \

  -y /tools/Xilinx/ISE/13.2/ISE_DS/ISE/verilog/src/XilinxCoreLib \

  -y /tools/Xilinx/ISE/13.2/ISE_DS/ISE/verilog/src/unimacro

 

where to find this B_GTXE1 module?

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2 Replies
Xilinx Employee
Xilinx Employee
4,426 Views
Registered: ‎07-16-2008

Re: V6 GTX IP simulation error

You need to compile secureip libraries.

Add "-f  /tools/Xilinx/ISE/13.2/ISE_DS/ISE/secureip/vcs/vcs_secureip_cell.list.f" in vcs command.

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Visitor kaihsin
Visitor
4,272 Views
Registered: ‎08-19-2012

Re: V6 GTX IP simulation error

Thanks for your answer. 

 

Simiarly, it also adds the -f  $XILINX/secureip/ncsim/emac_ncsim/ncsim_secureip_cell.list.f    for (Cadence Ncverilog tool).

 

Further, you can increase the complile speed to include only relating file rather than  all security file. 

(For example) : [EMAC] 

 

                         -f $XILINX/secureip/ncsim/emac_ncsim/emac_cell.list.f 

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