06-19-2018 09:51 AM
It's been almost a decade since VHDL-2008 was released. At a minimum, it would be great to use some of the 2008 features in simulation so that testbenches could be simpler and other tools such as OSVVM and VUNIT could be used for testing. Does anyone know when 2008 support will be completed? Will it ever be complete? Will support for whatever OSVVM and VUNIT require be added to the supported 2008 feature set?
06-19-2018 11:56 AM - edited 06-19-2018 12:00 PM
Both Altera/Intel and Xilinx have been very slow in adopting full VHDL 2008 support. Intel added full 2008 support only in 2017 with their pro version only, but they dont have a simulator so not all features are required. For some odd reason Xilinx list protected types as a 2008 feature (these have been in the language since 2002!). The supported list isnt much more than the synthesis list.
The main thing OSVVM requires is generic packages, as a lot of the code uses them. Also, functions and procedures as generics are required (generic types are listed as supported).
I think there are more requests for SV, but even support for this is far behind other simulators.
The cynic in me says this is all deliberate. The tools are good enough and the tools are not the money earner, the chips are. Improving the tools are not going to make them more money, as it is unlikely to sell more chips as existing FPGA engineers can already develop and most use 3rd party simulators. If you want to sell more chips, make HLS better - this pulls in more and more software that can be loaded on to an FPGA, which will sell more chips.
If you want OSVVM, you're going to have to shell out for a capable simulator. Or just go to the Intel website and get the free edition of Modelsim they ship with the web version. If OSVVM isnt already included, you should be able to include it yourself.
06-19-2018 12:39 PM
I'd say if your looking for VHDL support , look around the forums , and I would say its low on the priority list.
The examples are now all in Verilog, and at most provide a VHDL wrapper.
the documents only show verilog examples, no VHDL,
Draw your own conclusions on where Xilinx are going with VHDL.
06-20-2018 12:43 AM
The core of VUnit also supports VHDL-93 and VHDL-2002 so it would be possible to use it with xsim. There are other problems preventing such support, see https://github.com/VUnit/vunit/issues/209, but I know that people are using the unofficial https://github.com/PetterssonMagnus/vunit/tree/xsim branch of VUnit. Hopefully, there will be official support in the near future. If you want to see this happen you should give your thumbs up to the issue on Github.