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Observer flindner
Observer
8,399 Views
Registered: ‎07-25-2013

Vivado 2014.4 issues an error when passing elements of an array to a procedure

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Hi

 

I have the following Code for simulation (I know it will probably not synthesize, but that's intended)

 

architecture sim of something is

	subtype addrBufIndex is integer range 0 to 1;
	type transactionType is record 
		addr : integer;
		length : integer;
	end record;
	type transactionBufferType is array (addrBufIndex) of transactionType;
	signal readTrans : transactionBufferType;
	procedure setTransaction (signal transaction: out transactionType;
								addr : in std_logic_vector;
								len : in std_logic_vector) is
	begin

		transaction.addr <= conv_integer(addr);
		transaction.length <= CONV_INTEGER(len);
	end procedure;
begin

	readAddr_proc: process
		variable index : addrBufIndex;
	begin

		wait until valid='1';
		wait until rising_edge(clk);
		setTransaction(readTrans(index), inPort_addr, inPort_len);
		index := index +1;
		wait until rising_edge(clk);
	end process readAddr_proc;
	
end architecture sim;

 With Vivado 2013.2 or any ISE version or ModelSim it works fine. But with Vivado 2014.4 I get the following error:

ERROR: [VRFC 10-280] actual for formal port transaction is neither a static name nor a globally static expression

 

BTW: Which VHDL standard does Vivado use? 2008? I have not found anything to select the language standard (Only the switch between Verilog & VHDL)

 

Any ideas on this?

 

Regards Fabian

 

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Moderator
Moderator
15,025 Views
Registered: ‎01-16-2013

Re: Vivado 2014.4 issues an error when passing elements of an array to a procedure

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2 Replies
Moderator
Moderator
15,026 Views
Registered: ‎01-16-2013

Re: Vivado 2014.4 issues an error when passing elements of an array to a procedure

Jump to solution
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Observer flindner
Observer
8,386 Views
Registered: ‎07-25-2013

Re: Vivado 2014.4 issues an error when passing elements of an array to a procedure

Jump to solution
OK thanks for the quick answer
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