02-01-2016 09:56 AM
I am using Vivado 2014.4 and generated a SRIO Gen2 v3.2 core. My goal is to use this core to generate SRIO traffic.
I used the forum answer record below to generate the example design:
Once I have the example design, I am trying to simulate it in Modelsim. One of the blocks that is instantiated is "srio_gen2_v3_2_unifiedtop" (see attatchment), however, I don't think this was an output of Vivado 2014.4 when I generated the example design.
Any help would be appreciated,
02-01-2016 10:16 PM
Srio_gen2_v3.2_unifiedtop is the instantiation of the encrypted core file generated as output and the encrypted file can be seen at below hierarchy but name
Do you face any issue's while running simulation of the example design?
02-02-2016 08:20 AM
It looks like you are using gen2 version 4.0 while I am still on gen2 version 3.2, I don' tthink this should matter?
To make sure we are on the same page, I followed the path posted, are these the files you are refferring to?
02-02-2016 08:19 PM
Yes those are the encrypted files i am referring to.
02-03-2016 04:11 PM
I compiled both of the files into my Modelsim work directory. When I try to simulate the example design as described by PG007 Gen2 v3.2 (October 1, 2014) page 155, I get the following error:
** Error: nofile(53): in protected region
I know this is related to the srio_gen2_v3_2_rfs.vhd and srio_gen2_v3_2_rfs.v files because when I create a new project without those two files I get the error below
Module 'srio_gen2_v3_2_unifiedtop' is not defined.
Do you know what this nofile in protected region can mean?
02-03-2016 07:49 PM
Make sure you are using compatible Modelsim version and compiled the libraries correctly(Refer UG900).
Also refer below related thread
02-04-2016 01:59 PM
I have the necessary Xilinx libraries. I went to Vivado -> Tools -> Compile Simulation Libraries.. -> Compile; and made sure to point to the pre compiled libraries in my Modelsim.ini file.
Per the forum you linked:
There was a note "The library name MUST be unchanged. Else you get an error and because the file is encrypted, this was really painful to find out... Xilinx IP core models being dependant to their library name is definitely NOT a good practice in my opinion..."
As I understand it, I need to compile the srio_gen2_v3_2_rfs.v and srio_gen2_v3_2_rfs.vhd into a "srio_gen2_v3_2_unifiedtop" library. I have the following two commands:
vcom -novopt -work srio_gen2_v3_2_unifiedtop \
vlog -novopt -incr -work srio_gen2_v3_2_unifiedtop \
However, they do not seem to do anything as the generated library is empty (see attachment). When I try to simulate, I get a "Module 'srio_gen2_v3_2_unifiedtop' is not defined.: error.
In my previous post, I compiled those two files into my work library and got a "** Error: nofile(53): in protected region" error.
02-04-2016 10:33 PM
I suggest to do integrated Modelsim simulation and see if you face any issue's with it or if using standalone mode then use the scripts only option to genrate the simulaiton scripts which will take care of the library mapping and file fetching needed for the simulation.
Refer below doc for the command options to generate simulation scripts