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Contributor
Contributor
3,602 Views
Registered: ‎10-19-2010

problem in simulation of a RAM

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FOLLOWING IS MY CODE.

 

library IEEE;
use IEEE.STD_LOGIC_1164.ALL;
use IEEE.STD_LOGIC_ARITH.ALL;
use IEEE.STD_LOGIC_UNSIGNED.ALL;

 

entity ram is
    Port ( clka : in  STD_LOGIC;
           wea : in  STD_LOGIC;
           addra : in  STD_LOGIC_VECTOR (15 downto 0);
           dina : in  STD_LOGIC_VECTOR (7 downto 0);
           --en:in STD_LOGIC;
           douta : out  STD_LOGIC_VECTOR (7 downto 0));
end ram;

architecture ram_a of ram is

 

type mem is array (65535 downto 0) of std_logic_vector(7 downto 0);

signal ram: mem;
signal addr_s: STD_LOGIC_VECTOR (15 downto 0);
begin
process (clka)
begin
if(clka'event and clka='1')then
                       --if(en='1')then
--addr_s<=addra;                              
if (wea ='1')then
ram(conv_integer(addra))<=dina;
end if;
--else

douta<=ram(conv_integer(addra));
--
--
----end if;
end if;
end process;

 

end ram_a

 

THE PROBLEM FACED IS THE OUPUT PORT OF RAM IS ALWAYS 'U'.

 

BUT WHEN IS CHANGE THE addra POINTER(WHILE READING) TO ANOTHER pointer say addr_s  AND MAKE A SIGNAL ASSIGNMENT STATEMENT AS  addr_s<=addra-2; IT WORKED 

 

I FOLLOWED THE SAME CODING TECHNIQUE FOR (“Single-Port RAM in Read-First Mode Diagram”)  GIVEN IN XILINX XST DOC

HOPE I HAVE CLEARLY EXPLAINED MY PROBLEM

 

THANKS

I HAVE ATTACHED THE TEST BENCH FOR THE SAME

 

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Professor
Professor
4,433 Views
Registered: ‎08-14-2007

I FOLLOWED THE SAME CODING TECHNIQUE FOR (“Single-Port RAM in Read-First Mode Diagram”)

 

I think your RAM is doing exactly what it should in read-first mode.  This means

that the data out will be driven by the value that was in the RAM before you wrote it.

Since you did not initialize the RAM, this will be 'U' until you re-visit an address

that was previously written by the test-bench.

 

HTH,

Gabor

-- Gabor

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Highlighted
Professor
Professor
4,434 Views
Registered: ‎08-14-2007

I FOLLOWED THE SAME CODING TECHNIQUE FOR (“Single-Port RAM in Read-First Mode Diagram”)

 

I think your RAM is doing exactly what it should in read-first mode.  This means

that the data out will be driven by the value that was in the RAM before you wrote it.

Since you did not initialize the RAM, this will be 'U' until you re-visit an address

that was previously written by the test-bench.

 

HTH,

Gabor

-- Gabor

View solution in original post

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Contributor
Contributor
3,575 Views
Registered: ‎10-19-2010

in that case should i have to wait for the ram to be written first completely before i can see (read )valid (not u's) data . i e in this case after 65535 clocks

 

thanks for the help

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Instructor
Instructor
3,563 Views
Registered: ‎07-21-2009

in that case should i have to wait for the ram to be written first completely before i can see (read )valid (not u's) data . i e in this case after 65535 clocks

Yes, for a RAM with 16-bit address, unless you restrict read accesses to RAM addresses which have already been written.

 

- Bob Elkind

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