vivado: Running tcl commands from within my systemverilog testbench

[cartercheng]

Hi, I am trying to call the Tcl script (or actually call the vivado Tcl console command) within the SystemVerilog or Verilog file during the simulation, would this possible?  I'm asking about a method to run simulator-based tcl commands from within a SystemVerilog testbench. I know for another simulator there is DPI to do so. Thanks

[amaccre]

Hi @cartercheng 

I don't believe that it is possible to call a tcl command from with a System Verilog / Verilog file during simulation.

Depending on what you want to do you can use the export_simulation command to generate a script which can be modified.

Also there is support for DPI in Vivado Simulator, information on what is supported can be found in Appendix D of UG900.

Best Regards
Aidan