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Explorer
Explorer
1,037 Views
Registered: ‎04-29-2010

vivado simulator 2016.1 timing scale

Hi, 

Is Vivado simulator able to run in the resolution of fs? 

I don't mean just to display the resolution on the waveform window. I mean if it can truly run in that resolution?

 

For example, I have two clocks in my testbench with the following clock frequencies:

clock1 => 93.985 ps
clock2 => 93.976 ps

 

But it doesn't seem that the simulator can understand the offset between these two clocks !!

I don't see any difference in the period between clock1 and clock2, when I look at the waveform, but surely there is a difference.

 

 

By the way, yes, I understand that it is a super fast clock, and I have no intention of running such a high clock in the real design, but I am bench marking some characteristics, and I would need to see both clocks, to their correct resolution.

 

Any idea, how can this be accomplished?

 

Thanks, 

--Rudy 

 

 

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Moderator
Moderator
998 Views
Registered: ‎11-09-2015

Re: vivado simulator 2016.1 timing scale

Hi @rudy,

 

You might need to change the timescale configuration for xsim. I am not sure how it is done in VHDL but I would try adding the option vhdl time precision to 1fs in the xsim setting as per this topic:

https://forums.xilinx.com/t5/Simulation-and-Verification/Change-time-resolution-in-ISim-14-3/td-p/281394

 

Hope that helps,

 

Regards,


Florent
Product Application Engineer - Xilinx Technical Support EMEA
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