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progman64
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Registered: ‎08-16-2011

Generate a file with no visible code or internal RTL SCHEMATIC

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Hello.

 

I saw that some companies make a file that we can add to a new project, and we can call it in a top level, but we can not see the code or the RTL Internal Schematic. How can I generate a file like this? It can be usefull for the company, thank you for your time.

 

Regards!!!

 

Mechatronic Engineer Miguel Angel Marina Garduño

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gszakacs
Professor
Professor
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Registered: ‎08-14-2007

You need a source wrapper or "black box" to tell synthesis how to connect ports to the .ngc file,

but other than that it is "synthesizable" in that it can be merged with a design like any other

component or module.  There are some drawbacks to the .ngc approach which might make

it more useful to use encrypted source code instead.  However for most simple modules

that are not pushing performance limits of the device, the .ngc file approach works.  What you gain

with an encrypted source is the ability for the synthesizer to run global optimization on that

source along with the rest of a design.  This might be necessary when you are delivering a

larger portion of the overall design and need to meet tight timing constraints.  An encrypted

source could also be ported to different devices, whereas the .ngc file is pre-compiled for

a single device or family.  If you want to limit the usage of an encrypted source it might be

possible to tie the encryption license to a particular device.  So far I've only used one IP core

that was delivered as an encrypted source file, and a lot of IP cores delivered as .ngc files.

 

You don't need any special tools to generate the .ngc file, this is a normal output product

of ISE.  A typical way to generate an .ngc for delivery is to make a project containing just the

core, and synthesize it with "Add I/O Buffers" (-iobuf) turned off.

 

-- Gabor

-- Gabor

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jeffsen
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Registered: ‎12-11-2007

do you mean the netlist files, like .ngc from Xilinx?

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progman64
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Registered: ‎08-16-2011

I'm not sure, that file can be added like another module in a toplevel and it is syntetizable?

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gszakacs
Professor
Professor
6,174 Views
Registered: ‎08-14-2007

You need a source wrapper or "black box" to tell synthesis how to connect ports to the .ngc file,

but other than that it is "synthesizable" in that it can be merged with a design like any other

component or module.  There are some drawbacks to the .ngc approach which might make

it more useful to use encrypted source code instead.  However for most simple modules

that are not pushing performance limits of the device, the .ngc file approach works.  What you gain

with an encrypted source is the ability for the synthesizer to run global optimization on that

source along with the rest of a design.  This might be necessary when you are delivering a

larger portion of the overall design and need to meet tight timing constraints.  An encrypted

source could also be ported to different devices, whereas the .ngc file is pre-compiled for

a single device or family.  If you want to limit the usage of an encrypted source it might be

possible to tie the encryption license to a particular device.  So far I've only used one IP core

that was delivered as an encrypted source file, and a lot of IP cores delivered as .ngc files.

 

You don't need any special tools to generate the .ngc file, this is a normal output product

of ISE.  A typical way to generate an .ngc for delivery is to make a project containing just the

core, and synthesize it with "Add I/O Buffers" (-iobuf) turned off.

 

-- Gabor

-- Gabor

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evgenis1
Advisor
Advisor
4,748 Views
Registered: ‎12-03-2007

Hi,

 

Xilinx ISE installation has a utility called obngc that can obfuscate a netlist (mangle signal names). It's not as secure as encrypted netlist, but still makes it harder to reverse-engineer the design.

Not sure if that's what you're asking.

 

Thanks,

Evgeni

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