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Observer a.turowski
Observer
6,237 Views
Registered: ‎10-26-2012

Spartan 6 -Temperature prorating constraint problem

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Hi all,

 

I am using XC6SLX25-3CSG324I FPGA and ver 13.4 Xilinx tools. According to the datasheet this FPGA is capable of running with 100C of junction temperature and I want to make sure that the timing is closed at that temperature. I've set up

 

TEMPERATURE=100 C;

 

constrain in UCF file, but when I run PAR, it ignores that setting and comes up with the following warning:

 

Initializing temperature to 85.000 Celsius. (default - Range: 0.000 to 85.000 Celsius)
Initializing voltage to 1.140 Volts. (default - Range: 1.140 to 1.260 Volts)
WARNING:Par:236 - Voltage and/or Temperature prorating constraints have been defined for this design but they are not
yet supported for this architecture.

Device speed data version: "PRODUCTION 1.21 2012-01-07".

 

It looks like full industrial temperature range is not supported in ver 13.4 PAR tool. Is there a workaround this? Do I need updated device speed data?

 

Best regards,

Adam

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1 Solution

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Observer a.turowski
Observer
7,749 Views
Registered: ‎10-26-2012

Re: Spartan 6 -Temperature prorating constraint problem

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I think I found the answer to my question:

 

http://www.xilinx.com/support/answers/38221.html

 

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Observer a.turowski
Observer
6,217 Views
Registered: ‎10-26-2012

Re: Spartan 6 -Temperature prorating constraint problem

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Another observation: I've run PlanAhead 13.4 to create a dummy project. As a part of the process of setting up the project there is a dialog allowing to select the device one is targetting. So when I select "Spartan6" family, "Spartan6 LX" subfamily and CSG324 package, it displays only "C" or "N" options in "Temp Grade" pull-down list.

 

To double check, I've chosen "All" in Sub-Family pulldown list. Then I can choose "I" in Temp Grade pull down list. When I do that, only automotive devices (part numbers starting with XA6) are displayed.

 

So it looks like "normal" (not automotive) industrial temperature grade devices are not supported in 13.4 tools. Can anyone suggest why is that? Was the support for them added later on?

 

Best regards,

Adam

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Scholar austin
Scholar
6,209 Views
Registered: ‎02-27-2008

Re: Spartan 6 -Temperature prorating constraint problem

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Adam,

 

Is there an I grade part?  You need to specify the I grade part.  If there is no I grade part for this device, then 100C is not something we support (no gaurantee).

 

 

Austin Lesea
Principal Engineer
Xilinx San Jose
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Observer a.turowski
Observer
6,183 Views
Registered: ‎10-26-2012

Re: Spartan 6 -Temperature prorating constraint problem

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Austin,

 

No, there is no Spartan 6 LX "I" temperature range part in the list, which is quite suprising as I have "I" graded Spartan 6 LX parts XC6SLX25-3CSG324I fitted on my board. I attach two screenshots:

 

  1. Spartan6_family_I grade_CSG314_package.png file which contains the list of "I" temperature range parts displayed when one chooses "I" capable parts in Spartan6 family. Please note that only automotive parts are in this list.
  2. Spartan6_family_Spartan6LX_subfamily_CSG324_package.png file which contains the list of all parts available in Spartan6 LX subfamily. Please note that there is no "I" temperature range parts available at all.

All in all it looks like the tools ver 13.4 don't have any datafiles for XC6SLX25-3CSG324I I am using. Can anyone tell me why is that? Have these parts been added later? I've had a quick look into release notes for newer tools, but found no information about that.

 

Best regards,
Adam

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Observer a.turowski
Observer
7,750 Views
Registered: ‎10-26-2012

Re: Spartan 6 -Temperature prorating constraint problem

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I think I found the answer to my question:

 

http://www.xilinx.com/support/answers/38221.html

 

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Observer a.turowski
Observer
6,100 Views
Registered: ‎10-26-2012

Re: Spartan 6 -Temperature prorating constraint problem

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The explanation in answer record is reasonable, however I think PlanAhead GUI could be designed (by for example displaying all existing part numbers) so FPGA user doen't have to even read this answer record. That way software could deal with using correct speed file automatically.

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