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1,150 Views
Registered: ‎11-27-2016

Understanding High speed serial link development with SERDES in Spartan 6 board

Hi,

I have a requirement to develop high speed (order of 800 MHz) data link with 8:1 serialization factor. I have to communicate 2 SP605 boards. The design can be source synchronous.
My doubt is how to start developing such link. I have developed earlier UART based data link between 2 SP3 boards but at high speeds I need to utilize in built resources.

At conceptual level , I believe that I can use OSERDES in one FPGA board and link it with ISERDES in second board. I can provide a clock to both of the boards as required.
For developing such link I have started to read SP6 clock resources and SP6 select IO guide. For reference I am using XAPP 1064.
Pls guide me if my approach is correct or not.

SHould I start working on GTP transreceivers available on SP6 board for my application.

PLs let me know if I have confused you. I need some initial guidance for initiating my work.
Thanks

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4 Replies
Explorer
Explorer
1,117 Views
Registered: ‎01-09-2012

Re: Understanding High speed serial link development with SERDES in Spartan 6 board

@himanshu_tyagi

 

google following book: "High-Speed Serial I/O Made Simple" from Xilinx.

You will get a very good introduction to what a high speed serial design is and how it works.

 

Cheers

Goran

1,091 Views
Registered: ‎11-27-2016

Re: Understanding High speed serial link development with SERDES in Spartan 6 board

@gmarinkovic

I have read the book and developed some understanding. My doubt is which one to start first...SERDES based design or MGT based design

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Explorer
Explorer
1,079 Views
Registered: ‎01-09-2012

Re: Understanding High speed serial link development with SERDES in Spartan 6 board

@himanshu_tyagi

 

Ok, so you know about the tasks which you have to do if you work with serialized data. Doing all these tasks yourself is extremely helpful to learn everything down to the deepest level. So, it might be useful if you are given the time and joy to do fundamental work or you need to implement a lowest latency link or your FPGA simply has no MGT. However a question to you... the advantage of using the MGT is the availability of all the needed encoding, alignment, deserialization, elastic-buffering, ... and not to forget the IBERT and possibilities to check and adapt to your physical media. Which advantages do you see using the SERDES? Simply the pure HDL approach and that you have all the implementation detail in your hands? Or is it the already mentioned latency which you have to address? However you pay this by a lower achievable bitrate and missed opportunity to gain experience working with MGTs, which you will come across, latest when you implement interfaces for PCIe, or SATA, or USB3, or some other MGT based technology... depending on your age and will to learn: Try investing your time and creativity into something which you will gain the highest reuse. No matter if it is a MGT or SERDES based link.

 

Cheers

Goran

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1,073 Views
Registered: ‎11-27-2016

Re: Understanding High speed serial link development with SERDES in Spartan 6 board

OK, then I will go for SERDES based link, since it offers more insight.
Thanks
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