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Visitor varenyam
Visitor
9,568 Views
Registered: ‎10-11-2014

WARNING:Xst:1293 - FF/Latch <n_reg_1> has a constant value of 0 in block <uart_tx_unit>. This FF/Latch will be trimmed during the optimization process.

how can i remove my warnings ?

 

 

localparam [1:0]
idle = 2'b00,
start = 2'b01,
data = 2'b10,
stop = 2'b11;
// signal declaration
reg [1:0] state_reg,state_next;
reg [3:0] s_reg,s_next;
reg [2:0] n_reg,n_next;
reg [7:0] b_reg,b_next;
reg tx_reg,tx_next;
// body
// FSMD state & data registers
always @(posedge clk, posedge reset)
if(reset)
begin
state_reg <= idle;
s_reg <= 0;
n_reg <= 0;
b_reg <= 0;
tx_reg <= 1'b1;
end
else
begin
state_reg <= state_next;
s_reg <= s_next;
n_reg <= n_next;
b_reg <= b_next;
tx_reg <= tx_next;
end
initial
begin
n_reg=3'b000;
n_next=3'b000;
end
// FSMD next-state logic & functional units
always @*
begin
state_next = state_reg;
tx_done_tick = 1'b0;
s_next = s_reg;
n_next = n_reg;
b_next = b_reg;
tx_next = tx_reg;
case(state_reg)
idle:
begin
tx_next = 1'b1;
if(tx_start)
begin
state_next = start;
s_next = 0;
b_next = din;
end
end
start:
begin
tx_next = 1'b0;
if(s_tick)
if(s_reg==15)
begin
state_next = data;
s_next = 0;
n_next = 0;
end
else
s_next = s_reg + 1'b1;
end
data&colon;
begin
tx_next = b_reg[0];
if(s_tick)
if(s_reg==15)
begin
s_next = 0;
b_next = b_reg >> 1 ;
if(n_reg==(DBIT-1))
state_next = stop;
else
n_next = n_reg + 1'b1;
end
else
s_next = s_reg + 1'b1;
end
stop:
begin
tx_next = 1'b1;
if(s_tick)
if(s_reg==(SB_TICK-1))
begin
state_next = idle;
tx_done_tick = 1'b1;
end
else
s_next = s_reg + 1'b1;
end
endcase
end
//output
assign tx = tx_reg;
endmodule

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2 Replies
Xilinx Employee
Xilinx Employee
9,539 Views
Registered: ‎02-16-2014

Re: WARNING:Xst:1293 - FF/Latch <n_reg_1> has a constant value of 0 in block <uart_tx_unit>. This FF/Latch will be trimmed during the optimization process.

Hi,

 

Check this article,http://www.xilinx.com/support/answers/18397.htm

 

The synthesis tool thinks taht the particular flop has a constant value in the design. So,. it deletes the component and replaces it with the constant value.

Confirm if the warning is valid or not by checking whether the particular flipflop has constant value in the design or not.

 

 

 

 

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Mentor hgleamon1
Mentor
9,521 Views
Registered: ‎11-14-2011

Re: WARNING:Xst:1293 - FF/Latch <n_reg_1> has a constant value of 0 in block <uart_tx_unit>. This FF/Latch will be trimmed during the optimization process.

How is D_BIT defined?

 

Have you simulated this code? If not, why not? If so, have you simulated all possible branches of your FSM? 

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"That which we must learn to do, we learn by doing." - Aristotle
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