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Observer maciek11
Observer
5,854 Views
Registered: ‎07-16-2011

differential clock - pin confused

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Hi,

I have designed a board with Spartan-6 SLX25 (unfortunately  it has already been fabricated) and connected an external 200MHz differential generator to the following pins IO_L37P_GCLK13_0 and IO_L36N_GCLK14_0 instead of IO_L37P_GCLK13_0 and IO_L37N_GCLK12_0.

 

Is there any way to work it out (in FPGA without redesigning the PCB) ?

Is there any way to make the oscillator work (make it visible for the FPGA) despite the fact that the pins are confused ?

 

Thanks,

Maciek

 

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Xilinx Employee
Xilinx Employee
7,418 Views
Registered: ‎01-03-2008

Re: differential clock connected to odd pins

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If the other side of the LVDS pair is floating on the board there is a small chance that the LVDS receiver will self-bias and register a logic 1/0 on the side that is connected due to the dc balanced nature of the clock signal.  But, if it is connected to another active signal this won't work.

 

Hindsight is always 20-20, but you should verify that you design will work in the tools before the PCB is released for fabrication to prevent errors like this.

------Have you tried typing your question into Google? If not you should before posting.
Too many results? Try adding site:www.xilinx.com

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6 Replies
Teacher eteam00
Teacher
5,851 Views
Registered: ‎07-21-2009

Re: differential clock connected to odd pins

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The term "work it out' is pretty vague, particularly for hardware design.

 

If you want to receive the input clock differentially, I'm afraid that isn't likely to happen unless the differential pair is brought to inputs pins of a single differential receiver.  Is rework of the board a useful option for you?

 

Single-ended (non-differential) input option is still available, of course.

 

-- Bob Elkind

SIGNATURE:
README for newbies is here: http://forums.xilinx.com/t5/New-Users-Forum/README-first-Help-for-new-users/td-p/219369

Summary:
1. Read the manual or user guide. Have you read the manual? Can you find the manual?
2. Search the forums (and search the web) for similar topics.
3. Do not post the same question on multiple forums.
4. Do not post a new topic or question on someone else's thread, start a new thread!
5. Students: Copying code is not the same as learning to design.
6 "It does not work" is not a question which can be answered. Provide useful details (with webpage, datasheet links, please).
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Observer maciek11
Observer
5,849 Views
Registered: ‎07-16-2011

Re: differential clock connected to odd pins

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Bob,

I will have to rework the board. The second release of it will be free of this mistake and some other minor ones but before it is fabricated I would like to conduct some tests of DDR2 memory. In order to do it a clock signal on the current board is essential.

 

Is it possible to make the differential oscillator work in a single-ended configuration (without introducing changes to the PCB - everything is BGA which means no access to pins)  ? How could I do it ? (what FPGA settings should I apply to achieve it) ?

 

Thanks,

Maciek

 

 

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Xilinx Employee
Xilinx Employee
7,419 Views
Registered: ‎01-03-2008

Re: differential clock connected to odd pins

Jump to solution

If the other side of the LVDS pair is floating on the board there is a small chance that the LVDS receiver will self-bias and register a logic 1/0 on the side that is connected due to the dc balanced nature of the clock signal.  But, if it is connected to another active signal this won't work.

 

Hindsight is always 20-20, but you should verify that you design will work in the tools before the PCB is released for fabrication to prevent errors like this.

------Have you tried typing your question into Google? If not you should before posting.
Too many results? Try adding site:www.xilinx.com

View solution in original post

Teacher eteam00
Teacher
5,844 Views
Registered: ‎07-21-2009

rework to unconnected BGA pins?

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everything is BGA which means no access to pins

 

Curious that you would say this.  Every circuit board shop I've worked with has design rules which require in default a trace and a via to every BGA pin.  This is to maximise the consistency of solder reflow characteristics of the entire BGA pad array, and maximise manufacturing assembly yield.

 

In other words, even BGA pins which are not connected on the board schematic will have a via to the bottom of the circuit board, because the via (and trace to the pad) is part of the BGA layout 'dolly'.

 

These vias aren't easy to use for added wires, but they are usable and I have used them in the past.  If you only need a few boards modified, this may be a useful temporary solution.

 

Here is a (good, not great) example.  Top layer pattern is in blue, bottom layer pattern is in red.

forums-bga-top.png

 

forums-bga-bottom.png

 

-- Bob Elkind

SIGNATURE:
README for newbies is here: http://forums.xilinx.com/t5/New-Users-Forum/README-first-Help-for-new-users/td-p/219369

Summary:
1. Read the manual or user guide. Have you read the manual? Can you find the manual?
2. Search the forums (and search the web) for similar topics.
3. Do not post the same question on multiple forums.
4. Do not post a new topic or question on someone else's thread, start a new thread!
5. Students: Copying code is not the same as learning to design.
6 "It does not work" is not a question which can be answered. Provide useful details (with webpage, datasheet links, please).
7. You are not charged extra fees for comments in your code.
8. I am not paid for forum posts. If I write a good post, then I have been good for nothing.
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Teacher eteam00
Teacher
5,841 Views
Registered: ‎07-21-2009

hacking the oscillator

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Is it possible to make the differential oscillator work in a single-ended configuration

 

1.  What are the signal swings of the oscillator output?  If they are large enough, you might be able to get by with configuring one of the input pins as a single-ended (e.g. LVCMOS18) IO STANDARD.  Check oscillator output swing against DS162 Table 7.  If the oscillator diff pair is terminated with the standard 100-ohm, it may be helpful (increase signal swing) to remove the termination resistor.

 

2.  As a workaround, replace the oscillator with a single-ended output oscillator (and maybe scale back the output frequency to 100MHz instead of 200MHz). When rigging in the substitute oscillator, consider inserting a 22-ohm series R between the oscillator output pin and the circuit board trace.

 

Either of these will allow you to proceed with board checkout, including the DRAM.  If you change the oscillator frequency, you'll need to make a corresponding change to the PLL settings, but that's a minor nit.

 

-- Bob Elkind

SIGNATURE:
README for newbies is here: http://forums.xilinx.com/t5/New-Users-Forum/README-first-Help-for-new-users/td-p/219369

Summary:
1. Read the manual or user guide. Have you read the manual? Can you find the manual?
2. Search the forums (and search the web) for similar topics.
3. Do not post the same question on multiple forums.
4. Do not post a new topic or question on someone else's thread, start a new thread!
5. Students: Copying code is not the same as learning to design.
6 "It does not work" is not a question which can be answered. Provide useful details (with webpage, datasheet links, please).
7. You are not charged extra fees for comments in your code.
8. I am not paid for forum posts. If I write a good post, then I have been good for nothing.
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Observer maciek11
Observer
5,819 Views
Registered: ‎07-16-2011

Re: differential clock connected to odd pins

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Thanks !!! It helped ! - I have used the other pin (the floating one) as suggested mcgett.

 Details:

- LVDS_25

- the following differential pair was formed: O_L37P_GCLK13_0 and IO_L37N_GCLK12_0 (the floating pin)

- I had to set R100 parallel terminating resistor (otherwise it wouldn't work)

 

Bob,

My workshop didn't have such requirements. At least, now I know why it's critical to provide vias and traces to all unconnected pins (this is the first board I have designed which is build of more than 2 layers and features BGA components)

 

Thank you guys for help again,

Maciek

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