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What is BUFT in this RTL

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Explorer
Posts: 136
Registered: ‎08-31-2010
Accepted Solution

What is BUFT in this RTL

I have written a small code of mux which gives output when enable is high

The RTL schematic shows BUFT, what does this mean and why invertor is used with Enable

Why RTL is not showing the AND function of Enable with result.

If enable will be high then result will remain same, if enable is low, result will be other...

What i think it is something related to out=4'bz

kindly explain me


rtl.jpg
Mentor
Posts: 8,355
Registered: ‎07-21-2009

Re: What is BUFT in this RTL

[ Edited ]

BUFT is a tri-state output buffer.

Output is Z when T input=1.

 

You have defined in your schematic that output=Z when ENABLE=0, and that is why the inverter is inferred.

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View solution in original post


All Replies
Mentor
Posts: 8,355
Registered: ‎07-21-2009

Re: What is BUFT in this RTL

[ Edited ]

BUFT is a tri-state output buffer.

Output is Z when T input=1.

 

You have defined in your schematic that output=Z when ENABLE=0, and that is why the inverter is inferred.

SIGNATURE:
README for newbies is here: http://forums.xilinx.com/t5/New-Users-Forum/README-first-Help-for-new-users/td-p/219369

Summary:
1. Read the manual or user guide. Have you read the manual? Can you find the manual?
2. Search the forums (and search the web) for similar topics.
3. Do not post the same question on multiple forums.
4. Do not post a new topic or question on someone else's thread, start a new thread!
5. Students: Copying code is not the same as learning to design.
6 "It does not work" is not a question which can be answered. Provide useful details (with webpage, datasheet links, please).
7. You are not charged extra fees for comments in your code.
8. I am not paid for forum posts. If I write a good post, then I have been good for nothing.
Xilinx Employee
Posts: 2,480
Registered: ‎08-13-2007

Re: What is BUFT in this RTL

[ Edited ]

Actually, BUFTs are internal tristate buffers. OBUFTs are output tristates.

BUFTs were used on Virtex/Virtex-E/Spartan-II/Spartan-IIE but were not carried forward to Virtex-II, Spartan-3, or future families - for a variety of reasons including effects of process scaling.

 

They used to be used for things like large internal muxes - at least that's where I used them.

 

They are further described in the respective library guide and/or user guide.

 

Also useful:

http://www.xilinx.com/support/answers/20048.htm (XST - Warning "Xst:2183: the following tristate(s) are NOT replaced by logic" - Reasons XST cannot replace TBUFs with logic)

bt

 

== edit.fixed  typo

Mentor
Posts: 8,355
Registered: ‎07-21-2009

Re: What is BUFT in this RTL

Thanks, Tim.  I updated my post.

SIGNATURE:
README for newbies is here: http://forums.xilinx.com/t5/New-Users-Forum/README-first-Help-for-new-users/td-p/219369

Summary:
1. Read the manual or user guide. Have you read the manual? Can you find the manual?
2. Search the forums (and search the web) for similar topics.
3. Do not post the same question on multiple forums.
4. Do not post a new topic or question on someone else's thread, start a new thread!
5. Students: Copying code is not the same as learning to design.
6 "It does not work" is not a question which can be answered. Provide useful details (with webpage, datasheet links, please).
7. You are not charged extra fees for comments in your code.
8. I am not paid for forum posts. If I write a good post, then I have been good for nothing.
Explorer
Posts: 136
Registered: ‎08-31-2010

Re: What is BUFT in this RTL

[ Edited ]

Thanks i understood.

You people are really like a book for me

I am really impressed by Xilinx and their customer support. Their employes are also forthcoming and explaining the queries in detail in this forum