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rtfinch
Adventurer
Adventurer
1,927 Views
Registered: ‎01-06-2016

Abnormal program termination

Vivado 17.3 Synthesis quits with the following error:

 

Abnormal program termination (EXCEPTION_ACCESS_VIOLATION)
Please check 'C:/Cores5/N4V128/N4V128.runs/synth_1/hs_err_pid13128.log' for details

 

The log file just says to refer to the dump file.

Is there a way to work around this ?

(OS: Windows 10).

 

 

 

 

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7 Replies
hbucher
Scholar
Scholar
1,914 Views
Registered: ‎03-22-2016

@rtfinch Many times when I see this, it is solved with cleaning up your PATH environment variable.

Try reducing it to the minimum, perhaps try setting it explicitly on a shell and starting vivado in the command line to see if it works better.

 

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aher
Xilinx Employee
Xilinx Employee
1,810 Views
Registered: ‎07-21-2014

Hi @rtfinch

Is this issue resolved with suggestion provided above? If not can you share synthesis log file or if possible testcase?

Please let us know if you have any updates on this.

-Shreyas
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yeelinkoh
Visitor
Visitor
1,704 Views
Registered: ‎01-30-2018

Hi

 

I'm also encountering "abnormal program termination" when using Vivado 2017.3. The same project compiles fine in Vivado 2016.2.

Attached is the dump file. Any help or debug information highly appreciated.

 

Thanks!

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pulim
Xilinx Employee
Xilinx Employee
1,698 Views
Registered: ‎02-16-2014

Hi @yeelinkoh

 

Can you share the testcase to further debug this issue?

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yeelinkoh
Visitor
Visitor
1,685 Views
Registered: ‎01-30-2018

Hi @pulim, this is a relatively huge proprietary project. Let me see if I can isolate the issue and create a simpler testcase.

 

Thanks!

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yeelinkoh
Visitor
Visitor
1,667 Views
Registered: ‎01-30-2018

Hi @pulim

 

FYI, the issue has been resolved. Turns out that Vivado 2017.3 crashed when our SRAM code was wrongly modeled, hence got mapped to distributed RAM instead of blockRAM. Because the size as huge, I think the tool somehow ran out of memory.

I was able to isolate this issue because when running using Vivado 2016.2, the tool didn't crash but showed me a warning which gave me the clue to finding the culprit. Perhaps Xilinx could still investigate the discrepancy between how 2016.2 vs 2017.3 handles this scenario.

 

Thanks.

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pulim
Xilinx Employee
Xilinx Employee
1,659 Views
Registered: ‎02-16-2014

Hi @yeelinkoh

 

Good to hear that you were able to figure out the root cause for this issue.

If you can share the module or sample RAM code which is inferred as distributed RAM rather than BRAM, this will help us to further investigate this issue.If you can share the testcase please let me know, I will send you ezmove link where you can share the files with Xilinx.

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