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Explorer
Explorer
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Registered: ‎07-18-2011

Asym BRAM causes Vivado 2015.3 Synthesis to hang/freeze

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 Hi.

 

I've found that Vivado 2015.3 freezes during synthesis of infered asymmetric BRAMs. The same project synthesizes successfully in Vivado 2015.1 and 2015.2. The asym BRAM code is copied and pasted from UG901.

 

I've attached a SystemVerilog file with the asym BRAM module and another module that instantiates it. I would appreciate it if someone could please try for themselves and offer a work around.

 

Thank you,

David

 

 

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Explorer
Explorer
17,317 Views
Registered: ‎07-18-2011

Re: Asym BRAM causes Vivado 2015.3 Synthesis to hang/freeze

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I figured it out. The tool is choking on this line that declares and initializes the memory array:

 

reg [minWIDTH-1:0] RAM [0:maxSIZE-1] = '{maxSIZE{0}};

Although this works fine with Vivado 2015.1 and 2015.2 something has changed in 2015.3. My work around uses an ifdef so that the array is only initialized for simulation:

 

`ifdef SIMULATION
    reg [minWIDTH-1:0] RAM [0:maxSIZE-1] = '{maxSIZE{0}};
`else
    reg [minWIDTH-1:0] RAM [0:maxSIZE-1];
`endif

 

With this change the file synthesizes correctly.

 

 

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Moderator
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9,182 Views
Registered: ‎07-21-2014

Re: Asym BRAM causes Vivado 2015.3 Synthesis to hang/freeze

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@david.hoffman

 

Looks like the issue is with the parameters you are passing from top level to sub module, can you verify/change these parameters in order to proceed further.

 

Thanks,
Anusheel
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Explorer
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Registered: ‎07-18-2011

Re: Asym BRAM causes Vivado 2015.3 Synthesis to hang/freeze

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Thanks for your reply.

 

The parameters in the file I posted are the correct parameters. I'm defining a single asym BRAM with one 32x1k interface and one 1x32k interface. These same parameters synthesize correctly with 2015.1 and 2015.2.

 

Thank you,

David

 

 

 

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Explorer
Explorer
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Registered: ‎07-18-2011

Re: Asym BRAM causes Vivado 2015.3 Synthesis to hang/freeze

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@anusheel

 

Is this a bug in Vivado or is there something subtle I'm missing with the parameters? 

 

Thanks,

Dave

 

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Moderator
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Registered: ‎07-21-2014

Re: Asym BRAM causes Vivado 2015.3 Synthesis to hang/freeze

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@david.hoffman

 

I am checking your design and will update you further.

 

Thanks,
Anusheel
-----------------------------------------------------------------------------------------------
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Search related forums and make sure your query is not repeated.

Please mark the post as an answer "Accept as solution" in case it helps to resolve your query.
Helpful answer -> Give Kudos
-----------------------------------------------------------------------------------------------

 

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Explorer
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Registered: ‎07-18-2011

Re: Asym BRAM causes Vivado 2015.3 Synthesis to hang/freeze

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@anusheel

 

Have you had time to check my design? Can you please provide an update?

 

Thanks,

David

 

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Highlighted
Explorer
Explorer
17,318 Views
Registered: ‎07-18-2011

Re: Asym BRAM causes Vivado 2015.3 Synthesis to hang/freeze

Jump to solution

I figured it out. The tool is choking on this line that declares and initializes the memory array:

 

reg [minWIDTH-1:0] RAM [0:maxSIZE-1] = '{maxSIZE{0}};

Although this works fine with Vivado 2015.1 and 2015.2 something has changed in 2015.3. My work around uses an ifdef so that the array is only initialized for simulation:

 

`ifdef SIMULATION
    reg [minWIDTH-1:0] RAM [0:maxSIZE-1] = '{maxSIZE{0}};
`else
    reg [minWIDTH-1:0] RAM [0:maxSIZE-1];
`endif

 

With this change the file synthesizes correctly.

 

 

View solution in original post

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