06-22-2009 05:12 AM
I'm having a problem getting my code into a FPGA (virtex 4) with ISE 10.1.03 (sp3). It gives me the following error Place:850 - Delay element.
When I'm looking at the error it gives me this sollution:
This problem has been fixed in the latest 10.1 Service Pack available at:
The first service pack containing the fix is 10.1 Service Pack 3
Anybody other suggestions?
08-17-2009 12:22 PM