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Mapping a array into BRAM

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Visitor
Posts: 4
Registered: ‎03-12-2018

Mapping a array into BRAM

Hi,

 

 

I want an array in a module of my design (in Vivado) to be mapped on to BRAM instead of PLB LUTs.

 

Is there any directive which can do this operation?

 

Or is there any other way to do this?

Scholar
Posts: 1,869
Registered: ‎03-22-2016

Re: Mapping a array into BRAM

@karanpaluru21  Look at this  

https://www.xilinx.com/support/answers/54778.html

 

 

vitorian.com --- We do this for fun. Always give kudos. Accept as solution if your question was answered.
I will not answer to personal messages - use the forums instead.
ram_style.png
Visitor
Posts: 4
Registered: ‎03-12-2018

Re: Mapping a array into BRAM

I tried it, it still uses LUTs.

 

I synthesized my code and then viewed the schematics, the array is still using FFs and not BRAM.

Voyager
Posts: 298
Registered: ‎08-01-2012

Re: Mapping a array into BRAM

[ Edited ]

If it always maps to FFs then it suggests your code doesnt fit the behaviour profile of brams. You need to ensure your code follows the HDL style guidelines specified in UG901:

 

https://www.xilinx.com/support/documentation/sw_manuals/xilinx2017_2/ug901-vivado-synthesis.pdf

 

 

Moderator
Posts: 1,477
Registered: ‎07-21-2014

Re: Mapping a array into BRAM

@karanpaluru21

 

Looks like coding issue. Please check the generated log file and see if there are any details. Or attach the log file here.

 

Thanks

Anusheel

 

 

Visitor
Posts: 4
Registered: ‎03-12-2018

Re: Mapping a array into BRAM

I am attaching the methodology and the utilization files

Xilinx Employee
Posts: 379
Registered: ‎03-16-2017

Re: Mapping a array into BRAM

Hi @karanpaluru21,

 

Can you provide the runme.log file from your project directory -  .runs folder -  synth_1 - runme.log?

 

Regards,

hemangd

Visitor
Posts: 4
Registered: ‎03-12-2018

Re: Mapping a array into BRAM

I have attached the runnme file.

Moderator
Posts: 1,477
Registered: ‎07-21-2014

Re: Mapping a array into BRAM

@karanpaluru21

 

Here is the warning:

WARNING: [Synth 8-4767] Trying to implement RAM 'synapse_status_reg' in registers. Block RAM or DRAM implementation is not possible; see log for reasons.
Reason is one or more of the following :
1: Invalid write to RAM.
2: Unable to determine number of words or word size in RAM.
3: No valid read/write found for RAM.

 

Try to check the BRAM language template and compare the way you are reading and writing into the BRAM.

 

Thanks,

Anusheel