03-12-2018 10:43 AM
I want an array in a module of my design (in Vivado) to be mapped on to BRAM instead of PLB LUTs.
Is there any directive which can do this operation?
Or is there any other way to do this?
03-12-2018 10:55 AM
03-14-2018 03:07 AM - edited 03-14-2018 03:08 AM
If it always maps to FFs then it suggests your code doesnt fit the behaviour profile of brams. You need to ensure your code follows the HDL style guidelines specified in UG901:
03-19-2018 03:49 AM
Here is the warning:
WARNING: [Synth 8-4767] Trying to implement RAM 'synapse_status_reg' in registers. Block RAM or DRAM implementation is not possible; see log for reasons.
Reason is one or more of the following :
1: Invalid write to RAM.
2: Unable to determine number of words or word size in RAM.
3: No valid read/write found for RAM.
Try to check the BRAM language template and compare the way you are reading and writing into the BRAM.